메뉴 건너뛰기




Volumn 2606, Issue , 2003, Pages 365-376

Real-time reconfigurable linear threshold elements and some applications to neural hardware

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; FAULT TOLERANCE; RECONFIGURABLE HARDWARE; SPICE;

EID: 84956966208     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-36553-2_33     Document Type: Conference Paper
Times cited : (21)

References (20)
  • 2
    • 84957039477 scopus 로고    scopus 로고
    • A New 2-MOSFET Universal Floating-Gate Element for Reconfigurable Digital Logic
    • Sweden, 12-13 November
    • S. Aunet, Y. Berg, T. Sæther A New 2-MOSFET Universal Floating-Gate Element for Reconfigurable Digital Logic Proceedings of the 19th IEEE Norchip Conference, Kista, Sweden, 12-13 November 2001, pp. 240-245.
    • (2001) Proceedings of the 19Th IEEE Norchip Conference, Kista , pp. 240-245
    • Aunet, S.1    Berg, Y.2    Sæther, T.3
  • 10
    • 0004173639 scopus 로고    scopus 로고
    • in J. Rabaey, M. Pedram (editors), Kluwer Academic Publishers
    • J. Rabaey, M. Pedram, P. Landman Low Power Design Methodologies in J. Rabaey, M. Pedram (editors), Low Power Design Methodologies, Kluwer Academic Publishers, 1997.
    • (1997) Low Power Design Methodologies
    • Rabaey, J.1    Pedram, M.2    Landman, P.3
  • 12
    • 0035054933 scopus 로고    scopus 로고
    • Microprocessors for the New Millennium: Challenges, Opportunities, and New Frontiers Digest of technical papers
    • P. P. Gelsinger Microprocessors for the New Millennium: Challenges, Opportunities, and New Frontiers Digest of technical papers, IEEE International Solid-State Circuits Conference, 2001, pp. 22-25.
    • (2001) IEEE International Solid-State Circuits Conference , pp. 22-25
    • Gelsinger, P.P.1
  • 15
    • 0009582784 scopus 로고    scopus 로고
    • thesis for the cand. scient. degree, University of Oslo, Faculty of Mathematics and Natural Sciences, Department of informatics, May
    • R. Bahr A Design of Linear Four Quadrant Analog Multipliers Using Floating-Gate Transistors thesis for the cand. scient. degree, University of Oslo, Faculty of Mathematics and Natural Sciences, Department of informatics, May 2001.
    • (2001) A Design of Linear Four Quadrant Analog Multipliers Using Floating-Gate Transistors
    • Bahr, R.1
  • 17
    • 84956979696 scopus 로고    scopus 로고
    • Dissertation for the Ph.D. degree, California Institute of Technology
    • V. Bohossian Neural Logic: Theory and Implementation Dissertation for the Ph.D. degree, California Institute of Technology, 1998.
    • (1998) Theory and Implementation
    • Bohossianneural Logic, V.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.