Pseudo-resistive networks and their applications to analog collective computation

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1327, Issue , 1997, Pages 1134-1150

  Vittoz, E A ^a  

^a CSEM   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

BIOLOGICAL ORGANS; NEURAL NETWORKS; RESISTORS;

BASIC CONCEPTS; DIFFUSION NETWORKS; LINEAR ATTENUATION; LINEAR RESISTORS; MOMENT COMPUTATIONS; PATH FINDING; RESISTIVE NETWORK; SHAPE RECOGNITION;

FUZZY LOGIC;

EID: 84956667118     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0020305     Document Type: Conference Paper

References (24)

1. E. Vittoz, “Analog VLSI signal processing: why, where, and how”, Journal of VLSI Signal Processing, Vol. 8, pp.27-44, 1994.
2. E. Vittoz, “Micropower Techniques”, in Design of VLSI Circuits for Telecommunication and Signal Processing, Editors J. Franca and Y. Tsividis, Prentice Hall, Englewood Cliffs, 1994.
3. E. Vittoz and X. Arreguit, “Linear networks based on transistors”, Electronics Letters, vol. 29, pp.297-299, Febr. 4th, 1993.
4. K. Bult and G. Geelen, “A inherently linear and compact MOST-only current division technique”, Dig. ISSCC Tech. Papers, February 1992, pp.198-199.
5. K. W. Boahen and A. G. Andreou, “A contrast sensitive silicon retina with reciprocal synapses”, Advances in Neural Information Processing Systems, Vol.4, pp.764-772, Morgan Kaufmann Publishers, San Mateo, 1992.
6. B. Gilbert, “Translinear circuits: a proposed classification”, Electron. Letters, vol.11, p.14, 1975.
7. P. Venier et al., “Analog CMOS photosensitive array for solar illumination monitoring”, ISSCC’96 Dig. Tech. Paper, pp. 96-97, San Francisco, 1996.
8. B. K. P. Hom, “Parallel networks for machine vision”, The Artificial Intelligence Lab., M.I.T, Cambridge, MA, A.I. Memo No. 1071, Dec. 1988.
9. D. L. Standley, “An object position and orientation IC with embedded imager”, IEEE J. Solid-State Circuits, vol.26, pp. 1853-1859, December 1991.
10. C. A. Mead, Analog VLSI and neural systems, Addison-Wesley, Reading, 1989.
11. C. A. Mead and M. A. Mahowald, “A silicon model of early visual processing”, Neural Networks, vol.1, pp.91-97, 1988.
12. P. Venier, “A contrast sensitive silicon retina based on conductance modulation in a diffusion network”, MicroNeuro’97, Dresden.
13. E. Vittoz et al. “Analog VLSI implementation of a Kohonen map”, Dig. of the Journées d’Electronique 1989 on Artificial Neural Networks, EPF-Lausanne, pp.291-301.
14. P. Heim et al., “Generation of Learning Neighborhood in Kohonen Feature Maps by means of Simple Nonlinear network”, Electronics Letters, vol.27, No 3, pp.275-277, 1991.
15. A. Mortara and E. Vittoz, “A communication architecture tailored for analog VLSI artificial neural networks: intrinsic performance and limitations”, IEEE Trans, on Neural Networks, Vol. 5, pp.459-466, May 1994.
16. P. Venier et al., “An integrated cortical layer for orientation enhancement”, IEEE J. Solid-State Circuits, vol. 32, pp. 177-186, Feb. 1997.
17. O. Landolt, “Low-power analog fuzzy rule implementation based on a linear transistor network”, Proc. MicroNeuro’96, pp. 86-93, Lausanne, 1996.
18. T. Delbruck. “Bump circuits for computing similarity and dissimilarity of analog voltages”, Proc. of International Joint Conference on Neural Networks, vol. 1, pp. I-475-479, 1991.
19. O. Landolt, “Place coding in analog VLSI and its application to the control of a light deflection system”, MicroNeuro’97, Dresden.
20. L. Tarassenko et al., “Real-time autonomous robot navigation using VLSI neural networks”, in Advances in Neural Information Processing Systems, vol.3, R. P. Lippmann, J.E.Moody and D.S.Touretzky (editors), pp.422-428, Morgan Kaufmann, 1991.
21. S. Scotzniovsky, “Détection de ehemin dans un environnement avec obstacles”, Travail de Dipióme EPF-Lausanne, 1995 (in French).
22. L. Watts et al. “K bidirectional analog VLSI cochlear model”, in Advanced Research in VLSI, Proc. of the 1991 Santa Cruz Conference, M. I. T. Press, Cambridge, MA, pp. 153-163.
23. C. Enz et al., Low-voltage log-domain signal processing in CMOS and BiCMOS”, ISCAS’97, Hong Kong.
24. R. Fried et al. “On chip transient stability simulator 104 times faster than real time” Dig. 2nd Int. Conf. on Digital Power System Simulators-ICDS’97, Montréal, pp. 79-84.