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Volumn 1142, Issue , 1996, Pages 156-165
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Parallel CRC computation in FPGAs
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTATION THEORY;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
LOGIC SYNTHESIS;
PROGRAM COMPILERS;
CHECKSUMS;
LOGIC MINIMIZATION;
OPTIMIZERS;
STANDARD LOGIC;
COMPUTER CIRCUITS;
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EID: 84955611595
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/3-540-61730-2_16 Document Type: Conference Paper |
Times cited : (12)
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References (9)
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