Fast partial reconfiguration for FCCMs

Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998

Volumn 1998-April, Issue , 1998, Pages 1-2

  Sezer, S ^a   Heron, J ^a   Woods, R ^a   Turner, R ^a   Marshall, A ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

C++ (PROGRAMMING LANGUAGE); COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; SIGNAL FLOW GRAPHS;

CIRCUIT ARCHITECTURES; CONFIGURATION DATUM; CUSTOM COMPUTING MACHINES; MICROPROCESSOR INTERFACE; PARTIAL RECONFIGURATION; RE-CONFIGURATIONS; RECONFIGURABLE DESIGNS; RUN TIME RECONFIGURATION;

RECONFIGURABLE HARDWARE;

EID: 84954453418     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.1998.707934     Document Type: Conference Paper

References (3)

1. http://www.xilinx.com/apps/6200.htm
2. http://www.atmel.com/atmel/products/prod99.htm
3. S.Y. Kung. "VLSI Array Processors", Prentice Hall Information and System Sciences Series, 1988.