Novel single p+poly-Si/Hf/SiON gate stack technology on silicon-on-thin-buried-oxide (SOTB) for ultra-low leakage applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2015-August, Issue , 2015, Pages T170-T171

  Yamamoto, Y ^a   Makiyama, H ^a   Yamashita, T ^a   Oda, H ^a   Kamohara, S ^a   Sugii, N ^a   Yamaguchi, Y ^a   Mizutani, T ^b   Kobayashi, M ^b   Hiramoto, T ^b  

^a Low power Electronics Association and Project LEAP   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COST EFFECTIVENESS; POLYCRYSTALLINE MATERIALS;

CMOS TECHNOLOGY; COST EFFECTIVE; GATE STACK TECHNOLOGY; GATE STACKS; INTERNET OF THING (IOT); THIN BURIED OXIDES; ULTRA LOW LEAKAGES; ULTRA-LOW-VOLTAGE;

LOGIC GATES;

EID: 84951204317     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2015.7223665     Document Type: Conference Paper

References (7)

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7. Y. Yamamoto et al., Ext. Abstr. IWDTF, p.89 (2013).