IMAPCAR: A highly parallel integrated memory array processor for in-vehicle image recognition applications

13th World Congress on Intelligent Transport Systems and Services

Volumn , Issue , 2006, Pages

  Okazaki, Shinichiro ^a   Kyo, Shorin ^a   Hidano, Fumiyuki ^b  

^a NEC CORPORATION   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

Driver assistance; Image recognition; Intelligent vehicle; Processor; Safety; Sensor

Indexed keywords

ACCIDENT PREVENTION; AUTOMOBILE DRIVERS; IMAGE PROCESSING; IMAGE RECOGNITION; INTELLIGENT SYSTEMS; SENSORS; TRAFFIC CONTROL; TRANSPORTATION; VEHICLE PERFORMANCE; VEHICLES; VERY LONG INSTRUCTION WORD ARCHITECTURE;

APPLICATION DEVELOPMENT; AUTOMOTIVE APPLICATIONS; COMPUTATION PERFORMANCE; COMPUTATIONAL PERFORMANCE; DRIVER ASSISTANCE; HIGH PERFORMANCE DEVICES; PROCESSOR; PROGRAMMING FLEXIBILITY;

INTELLIGENT VEHICLE HIGHWAY SYSTEMS;

EID: 84950165451     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. S. Kyo et al., "A 51. 2-GOPS Scalable Video Recognition Processor for Intelligent Cruise ControlBased on a Linear Array of 128 Four-Way VLIW Processing Elements", IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 11, NOVEMBER 2003
2. S. Kyo, et al., "A Parallelizing Method for Implementing Image Processing Tasks on SIMD Linear Processor Arrays", Proc. of IEEE Workshop on Computer Architecture for MachinePerception, pp. 180-184, 1997.