Requester-aware power reduction

Proceedings of the International Symposium on System Synthesis

Volumn 2000-January, Issue , 2000, Pages 18-23

  Lu, Yung Hsiang ^a   Benini, L ^b   De Micheli, G ^a  

^a STANFORD UNIVERSITY   (United States)

^b UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

Batteries; Clocks; Degradation; Delay; Energy consumption; Energy management; Frequency; Hard disks; Hardware; Sleep

Indexed keywords

CLOCKS; COMPUTER HARDWARE; DEGRADATION; ENERGY MANAGEMENT; ENERGY UTILIZATION; HARD DISK STORAGE; SOLAR CELLS; SYNTHESIS (CHEMICAL);

CLOCK FREQUENCY; DELAY; FREQUENCY; HARDWARE DEVICES; PERFORMANCE DEGRADATION; POWER REDUCTIONS; SLEEP; SOFTWARE PROGRAM;

HARDWARE;

EID: 84949965262     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSS.2000.874024     Document Type: Conference Paper

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