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Volumn 2000-January, Issue , 2000, Pages 204-209

Application of SU-8 in flip chip bump micromachining for millimeter wave applications

Author keywords

Degradation; Etching; Flip chip; Lithography; Mass production; Micromachining; MMICs; Prototypes; Radio frequency; Resists

Indexed keywords

ASPECT RATIO; CHIP SCALE PACKAGES; COMPOSITE MICROMECHANICS; DEGRADATION; ELECTRONICS PACKAGING; ETCHING; FLIP CHIP DEVICES; LITHOGRAPHY; MICROMACHINING; MILLIMETER WAVES; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; PHOTOLITHOGRAPHY; PHOTORESISTS;

EID: 84949546084     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2000.906374     Document Type: Conference Paper
Times cited : (4)

References (10)
  • 1
    • 0006993363 scopus 로고
    • Advanced Ceramic Packaging and Multichip Modules
    • March/April
    • Hargis, B; "Advanced Ceramic Packaging and Multichip Modules", Advancing Microelectronics, March/April 1994, p. 45.
    • (1994) Advancing Microelectronics , pp. 45
    • Hargis, B.1
  • 3
    • 60849105381 scopus 로고    scopus 로고
    • Optimisation and Characterization of Ultrathick Photoresist Films
    • Proc. Advances in Resist Technology and Processing XV
    • Flack, W; Fan, W; and White, W; "Optimisation and Characterization of Ultrathick Photoresist Films", Proc. Advances in Resist Technology and Processing XV, Proc. SPIE, Vol. 3333, 1998, pp. 1288-1303.
    • (1998) Proc. SPIE , vol.3333 , pp. 1288-1303
    • Flack, W.1    Fan, W.2    White, W.3
  • 5
    • 0032681060 scopus 로고    scopus 로고
    • Considerations for Electroplated Copper for Sub-micron Interconnects in Advanced Integrated Circuits
    • Jun 21-24
    • Gross, M.E; "Considerations for Electroplated Copper for Sub-micron Interconnects in Advanced Integrated Circuits", Proc. AESF SUR/FIN '99 Technical Conference, Jun 21-24, 1999.
    • (1999) Proc. AESF SUR/FIN '99 Technical Conference
    • Gross, M.E.1
  • 7
    • 0026184448 scopus 로고
    • Technologies of High Aspect Ratio Plating
    • July
    • Forrest, G; "Technologies of High Aspect Ratio Plating", Printed Circuit Fabrication, Vol. 14, No. 7, July 1991, pp. 44-47.
    • (1991) Printed Circuit Fabrication , vol.14 , Issue.7 , pp. 44-47
    • Forrest, G.1
  • 10
    • 0032690835 scopus 로고    scopus 로고
    • Electrolytic Plating of Copper for Emerging Computer Chip Interconnect Technologies : Key Challengs and Opportunities
    • Neely, C; Reynolds, H.V; "Electrolytic Plating of Copper for Emerging Computer Chip Interconnect Technologies : Key Challengs and Opportunities", Proc. AESF Technical Conference, 1999, pp. 129-134.
    • (1999) Proc. AESF Technical Conference , pp. 129-134
    • Neely, C.1    Reynolds, H.V.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.