Design of enhanced differential cascode voltage switch logic (EDCVSL) circuits for high fan-in gate

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 2002, Pages 309-313

  Kang, Dae Woon ^a   Kim, Yong Bin ^a  

^a Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS;

DIFFERENTIAL CASCODE VOLTAGE SWITCH LOGIC; HIGH FAN-IN; LOGIC STYLE; LOGIC TREE; LOW POWER VLSIS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 84949441386     PISSN: 10630988     EISSN: None     Source Type: Journal    
DOI: 10.1109/ASIC.2002.1158076     Document Type: Article

References (6)

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2. L. G. Heller, W. R, Griffin, J. W. Davis, and N. G. Thoma, "Cascode voltage switch logic: A differential CMOS logic family", ISSCC Dig. Tech. Papers, pp. 16-17, Feb. 1984
3. K. M. Chu, D. L. Pulfrey, "A Comparison of CMOS Circuit Techniques: Differential Cascode Voltage Switch Logic Versus Conventional Logic", IEEE J. Solid-State Circuits, vol.22, pp.528-532, August 1987
4. D. Somasekhar and K. Roy, "Differential current switch logic: A low power DCVS logic family", IEEE J. Solid-State Circuits, vol.31, pp.981-991, July 1996
5. Joonbae-Park, Jeongho-Lee, Wonchan-Kim, "Current sensing differential logic (CSDL) for low-power and high-speed systems", Proceedings of the IEEE ISCAS vol.6, pp.129-32,1998
6. R. K. Bryanton, and C. McMullen, "The decomposition and factorization of Boolean expressions", Proceedings of the IEEE ISCAS, pp.49-54,1998