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Volumn 2147, Issue , 2001, Pages 584-589

Efficient mapping of pre-synthesized IP-cores onto dynamically reconfigurable array architectures

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL OPTIMIZATION; COMPUTER AIDED DESIGN; COMPUTER HARDWARE; DYNAMIC MODELS; INTELLECTUAL PROPERTY CORE; MAPPING; MICROELECTRONICS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; SYSTEM-ON-CHIP;

EID: 84949255707     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44687-7_60     Document Type: Conference Paper
Times cited : (7)

References (20)
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    • Future Research, Application and Education Perspectives of Complex Systems-on-Chip (SoC)
    • October, Tallinn, Estonia
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    • (2000) Proc. Of Baltic Electronic Conference (BEC 2000)
    • Glesner, M.1    Becker, J.2    Pionteck, T.3
  • 3
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    • Real-Time Image Processing on a Custom Computing Platform
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    • P. Athanas, A. Abbot: Real-Time Image Processing on a Custom Computing Platform, IEEE Computer, vol. 28, no. 2, Feb. 1995.
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    • Athanas, P.1    Abbot, A.2
  • 4
    • 84949301525 scopus 로고    scopus 로고
    • A Novel Machine Paradigm to Accelerate Scientific Computing; Special issue on Scientific Computing of Computer Science and Informatics
    • R. W. Hartenstein, J. Becker et al.: A Novel Machine Paradigm to Accelerate Scientific Computing; Special issue on Scientific Computing of Computer Science and Informatics Journal, Computer Society of India, 1996.
    • (1996) Journal, Computer Society of India
    • Hartenstein, R.W.1    Becker, J.2
  • 5
    • 0030714347 scopus 로고    scopus 로고
    • Reconfigurable Processing: The Solution to Low-Power Programmable DSP
    • Munich, pp., April
    • J. Rabaey, "Reconfigurable Processing: The Solution to Low-Power Programmable DSP", Proceedings ICASSP 1997, Munich, pp., April 1997.
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    • Rabaey, J.1
  • 6
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    • DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communication Applications
    • Villach, Österreich
    • J. Becker, et al.: DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communication Applications; in: 10th Int´l. Conf. on Field Programmable Logic and Applications, Villach, Österreich, 2000.
    • (2000) 10Th Int´l. Conf. On Field Programmable Logic and Applications
    • Becker, J.1
  • 7
  • 8
    • 4444342460 scopus 로고    scopus 로고
    • Design and Test of Core-Based Systems on Chips
    • Oct. - Dec
    • Y. Zorian, R. K. Gupta: Design and Test of Core-Based Systems on Chips; in IEEE Design & Test of Computers, pp. 14-25, Oct. - Dec. 1997.
    • (1997) IEEE Design & Test of Computers , pp. 14-25
    • Zorian, Y.1    Gupta, R.K.2
  • 9
    • 84949301528 scopus 로고    scopus 로고
    • Xilinx Corp
    • Xilinx Corp.: http://www.xilinx.com/products/virtex.htm.
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    • Altera Corp
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    • Triscend Inc
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    • Hitachi Semiconductor
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    • -GOLD: A multimode basband platform for future mobile terminals.,CTMC’99
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.