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Volumn 2001-January, Issue , 2001, Pages 123-127

Nanotechnology circuit design - The "interconnect problem"

Author keywords

[No Author keywords available]

Indexed keywords

ELECTROMIGRATION; INTEGRATED CIRCUIT MANUFACTURE; NANOTECHNOLOGY;

EID: 84949238235     PISSN: 19449399     EISSN: 19449380     Source Type: Conference Proceeding    
DOI: 10.1109/NANO.2001.966405     Document Type: Conference Paper
Times cited : (7)

References (7)
  • 2
    • 84949261889 scopus 로고    scopus 로고
    • http://www.sc.doe.gov/production/bes/IWGN.Public.Brochure/welcome.htm
  • 3
    • 84949261890 scopus 로고    scopus 로고
    • http://www.sc.doe.gov/production/bes/NNI.htm
  • 4
    • 84949261891 scopus 로고    scopus 로고
    • http://www.ornl.gov/ment
  • 5
    • 84949261892 scopus 로고    scopus 로고
    • http://www.nsf.gov/home/crssprgm/nano/start.htm
  • 7
    • 0023365853 scopus 로고
    • A method for predicting VLSI-device reliability using series models for failure mechanisms
    • D. F. Frost and K. F. Poole, "A Method for Predicting VLSI-Device Reliability Using Series Models for Failure Mechanisms", IEEE Trans. Reliab., vol. R-36, no. 2, pp. 234-242, 1987.
    • (1987) IEEE Trans. Reliab. , vol.R-36 , Issue.2 , pp. 234-242
    • Frost, D.F.1    Poole, K.F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.