Formal verification of ia-64 division algorithms

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1869, Issue , 2000, Pages 233-251

  Harrison, John ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL ARITHMETIC; EFFICIENCY; FORMAL LOGIC; PROGRAM COMPILERS; THEOREM PROVING;

ASSEMBLY LANGUAGE; DIVISION ALGORITHMS; EFFICIENCY IMPROVEMENT; FLOATING POINTS; INTEGER DIVISION; MAXIMUM EFFICIENCY; THEOREM PROVERS; VERIFICATION PROCESS;

FORMAL VERIFICATION;

EID: 84949223489     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44659-1_15     Document Type: Conference Paper

References (16)

1. Marius Cornea, Cristina Iordache, Peter Markstein, and John Harrison. Integer divide and remainder operations in the Intel IA-64 architecture. In Jean-Claude Ba-jard, Christiane Frougny, Peter Kornerup, and Jean-Michel Muller, editors, RNC4, the fourth international conference on Real Numbers and Computers, pages 161—184, 2000.
2. Marius Cornea-Hasegan. Proving the IEEE correctness of iterative floating-point square root, divide and remainder algorithms. Intel Technology Journal, 1998-Q2:1-11, 1998. See http://developer.intel.com/technology/itj/q21998/articles/art_3. htm.
3. Guy Cousineau and Michel Mauny. The Functional Approach to Programming. Cambridge University Press, 1998.
4. Carole Dulong. The IA-64 architecture at work. IEEE Computer, 64(7):24-32, July 1998.
5. Michael J. C. Gordon and Thomas F. Melham. Introduction to HOL: a theorem proving environment for higher order logic. Cambridge University Press, 1993.
6. Michael J. C. Gordon, Robin Milner, and Christopher P. Wads worth. Edinburgh LCF: A Mechanised Logic of Computation, volume 78 of Lecture Notes in Computer Science. Springer-Verlag, 1979.
7. John Harrison. HOL Light: A tutorial introduction. In Mandayam Srivas and Albert Camilleri, editors, FMCAD'96, volume 1166 of Lecture Notes in Computer Science, pages 265-269. Springer-Verlag, 1996.
8. John Harrison. Theorem Proving with the Real Numbers. Springer-Verlag, 1998. Revised version of author's PhD thesis.
9. John Harrison. A machine-checked theory of floating point arithmetic. In Yves Bertot, Gilles Dowek, Andre Hirschowitz, Christine Paulin, and Laurent Thery, editors, TPHOLs'99, volume 1690 of Lecture Notes in Computer Science, pages 113-130, 1999. Springer-Verlag.
10. IEEE. Standard for binary floating point arithmetic. ANSI/IEEE Standard 754-1985, The Institute of Electrical and Electronic Engineers, Inc.
11. Peter Markstein. Computation of elementary functions on the IBM RISC System/6000 processor. IBM Journal of Research and Development, 34:111-119, 1990.
12. Peter Markstein. IA-64 and Elementary Functions: Speed and Precision. Prentice-Hall, 2000.
13. J Strother Moore, Tom Lynch, and Matt Kaufmann. A mechanically checked proof of the correctness of the kernel of the AMD5k86 floating-point division program. IEEE Transactions on Computers, 47:913-926, 1998.
14. John O'Leary, Xudong Zhao, Rob Gerth, and Carl-Johan H. Seger. Formally verifying IEEE compliance of floating-point hardware. Intel Technology Journal, 1999-QL1-T4, 1999. http://developer.intel.com/technology/itj/ql1999/articles/art_5. htm.
15. David Rusinoff. A mechanically checked proof of IEEE compliance of a register-transfer-level specification of the AMD-K7 floating-point multiplication, division, and square root instructions. LMS Journal of Computation and Mathematics, 1:148-200, 1998. Available on the Web via http://www.onr.com/user/russ/david/k7-div-sqrt.html.
16. Pierre Weis and Xavier Leroy. Le langage Caml. InterEditions, 1993. See also the CAML Web page: http://pauillac.inria.fr/caml/.