Initial analysis of the Proteus architecture

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2147, Issue , 2001, Pages 623-627

  Dales, Michael ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; COMPUTER CIRCUITS;

CUSTOM FUNCTION; GENERAL-PURPOSE MICROPROCESSORS; PERFORMANCE BENEFITS; RECONFIGURABLE FUNCTION UNITS; RECONFIGURATION COSTS;

RECONFIGURABLE ARCHITECTURES;

EID: 84949223342     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44687-7_67     Document Type: Conference Paper

References (11)

1. ARM Ltd. ARM Architecture Reference Manual, DDI 0100D edition, 2000.
2. Michael Dales. The Proteus Processor—A Conventional CPU with Reconfigurable Functionality. In 9th International Workshop on Field Programmable Logic and Applications, pages 431–437. Springer–Verlag, September 1999.
3. John R. Hauser and John Wawrzynek. GARP: A MIPS processor with a reconfigurable coprocessor. In J. Arnold and K. L. Pocek, editors, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 12–21, Napa, CA, April 1997.
4. Infineon. Infineon introduces configurable CARMEL DSP Core for 3G wireless and broadband communication applications. Infineon Press Release, March 2000.
5. Intel. Using MMX Instructions to Implement Audio Echo Sound Effects. Unpublished Technical Report, 2001.
6. Rahul Razdan and Michael D. Smith. High–Performance Microarchitectures with Hardware–Programmable Functional Units. In Proc. 27th Annual IEEE/ACMInternational Symposium on Microarchitecture, pages 172–180, November 1994.
7. S. Sawitzki, A. Gratz, and R. G. Spallek. CoMPARE: A Simple Reconfigurable Processor Architecture Exploiting Instruction Level Parallelism. In Proceedings of the 5th Australasian Conference on Parallel and Real-Time Systems, 1998.
8. Bruce Schneier, John Kelsey, Doug Whiting, David Wagner, Chris Hall, and Niels Ferguson. Twofish: A 128–Bit Block Cipher, June 1998. AES Proposal.
9. Sidsa. FIPSOC Mixed Signal System–on–Chip. SIDSA Semiconductor Design Solutions, 2000.
10. Triscend. Triscend A7 Configurable System–on–Chip Family. Triscend Corporation, 2000.
11. Xilinx. The Programmable Logic Data Book 1999. Xilinx, 1999