CLEVER: Divide and conquer combinational logic equivalence verification with false negative elimination

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2102, Issue , 2001, Pages 131-143

  Moondanos, John ^a   Seger, Carl H ^a   Hanna, Ziyad ^a   Kaiss, Daher ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTER AIDED ANALYSIS; RECONFIGURABLE HARDWARE;

COMBINATIONAL LOGIC; COMPLEX CIRCUITS; COUNTER EXAMPLES; DIVIDE AND CONQUER; EQUIVALENCE VERIFICATION; FALSE NEGATIVES; MICROPROCESSOR DESIGNS; NORMALIZED FUNCTIONS;

ALGORITHMS;

EID: 84949205457     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44585-4_12     Document Type: Conference Paper

References (10)

1. R.E. Bryant: Graph-based algorithms for boolean function manipulation, IEEE Transactions on CAD, 1986
2. M. Fujita, H. Fujisawa, and N. Kawato: Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams, ICCAD 1988
3. R. Rudell: Dynamic variable ordering for ordered binary decision diagrams, ICCAD 1993, pp. 2-5
4. Y. Matsunaga: An ecient equivalence checker for combinatorial circuits, DAC 1996, pp. 629-634
5. S.M. Reddy, W. Kunz, and D.K. Pradhan: Novel verifcation framework combining structural and OBDD methods in a synthesis environment, DAC 1995, pp. 414-419
6. M. Abramovici, M.A. Breuer and A.D. Friedman: Digital Systems Testing and Testable Design, Computer Science Press, 1990
7. T. Nakaoka, S. Wakabayashi, T. Koide, and N. Yoshida: A Verifcation Algorithm for Logic Circuits with Internal Variables, ISCAS 1995, pp. 1920-1923
8. A. Kuhlmann and F. Krohm: Equivalence Checking using Cuts and Heaps, DAC 1997
9. Pixley. Method for determining functional equivalence between design models United States Patent 5754454, May 19, 1998
10. M.D. Aagaard, R.B. Jones, C.H. Seger: Formal Verifcation Using Parametric Rep- resentations of Boolean Constraints, DAC 1999, pp. 402-407.