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Volumn 1393, Issue , 1998, Pages 273-292

Specification of an integrated circuit card protocol application using the B method and linear temporal logic

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; LOGIC CIRCUITS; MODEL CHECKING; SPECIFICATIONS; TEMPORAL LOGIC; TIMING CIRCUITS;

EID: 84949188432     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0053367     Document Type: Conference Paper
Times cited : (6)

References (22)
  • 1
    • 0004025792 scopus 로고    scopus 로고
    • Cambridge University Press
    • J. R. Abrial-The B Book-Cambridge University Press, 1996-ISBN 0521-496195.
    • (1996) The B Book
    • Abrial, J.R.1
  • 4
    • 35248880203 scopus 로고    scopus 로고
    • Constructions d’Automatismes Industriels avec B
    • Toulouse-Mai
    • J. R. Abrial-Constructions d’Automatismes Industriels avec B-Congrés AFADL-ONERA-CERT Toulouse-Mai 1997.
    • (1997) Congrés AFADL-ONERA-CERT
    • Abrial, J.R.1
  • 10
    • 0002147440 scopus 로고
    • Simple on-the-fly automatic verification of linear temporal logic
    • Warsaw-Poland
    • R. Gerth, D. Peled, M. Vaxdi, P. Wolper-Simple on-the-fly automatic verification of linear temporal logic-Proc. PSTV95 Conference-Warsaw-Poland-1995.
    • (1995) Proc. PSTV95 Conference
    • Gerth, R.1    Peled, D.2    Vaxdi, M.3    Wolper, P.4
  • 14
    • 0012805577 scopus 로고    scopus 로고
    • State compression in SPIN
    • Twente University-April
    • G. Holzmann-State compression in SPIN. Proc. 3rd Spin Workshop-Twente University-April 1997.
    • (1997) Proc. 3rd Spin Workshop
    • Holzmann, G.1
  • 17


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