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Volumn 1393, Issue , 1998, Pages 273-292
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Specification of an integrated circuit card protocol application using the B method and linear temporal logic
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Author keywords
[No Author keywords available]
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Indexed keywords
INTEGRATED CIRCUITS;
LOGIC CIRCUITS;
MODEL CHECKING;
SPECIFICATIONS;
TEMPORAL LOGIC;
TIMING CIRCUITS;
B METHOD;
CONSTRUCTION METHOD;
INCREMENTAL VERIFICATION;
INTEGRATED CIRCUIT CARDS;
LINEAR TEMPORAL LOGIC;
MODEL CHECKER;
MULTI-FORMALISM SPECIFICATIONS;
SCHLUMBERGER;
COMPUTER CIRCUITS;
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EID: 84949188432
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/bfb0053367 Document Type: Conference Paper |
Times cited : (6)
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References (22)
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