Instruction stream mutation for non-deterministic processors

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

Volumn 2002-January, Issue , 2002, Pages 286-295

  Irwin, J ^a   Page, D ^a   Smart, N P ^a  

^a UNIVERSITY OF BRISTOL   (United Kingdom)

Author keywords

Computer science; Computer security; Costs; Cryptography; Genetic mutations; Hardware; Pipelines; Power measurement; Registers; Runtime

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SCIENCE; COSTS; CRYPTOGRAPHY; ELECTRIC POWER MEASUREMENT; HARDWARE; HARDWARE SECURITY; PIPELINES; SECURITY OF DATA; SIDE CHANNEL ATTACK; SMART CARDS;

COMPROMISE ALGORITHM; CRYPTOGRAPHIC ALGORITHMS; CRYPTOGRAPHIC HARDWARE; DIFFERENTIAL POWER ANALYSIS; GENETIC MUTATIONS; PROCESSOR PIPELINES; REGISTERS; RUNTIMES;

PIPELINE PROCESSING SYSTEMS;

EID: 84948778220     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.2002.1030727     Document Type: Conference Paper

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