-
2
-
-
84976830456
-
Scheduling and mapping: Software pipelining in presence of structural hazards
-
La Jolla, CA, June. ACM SIGPLAN
-
Erik R. Altman, R. Govindarajan, and Guang R. Gao. Scheduling and mapping: Software pipelining in presence of structural hazards. In Conference on Programming Language Design and Implementation, pages 139-150, La Jolla, CA, June 1995. ACM SIGPLAN.
-
(1995)
Conference on Programming Language Design and Implementation
, pp. 139-150
-
-
Altman, E.R.1
Govindarajan, R.2
Gao, G.R.3
-
5
-
-
0029205679
-
Optimum modulo schedules for minimum register requirements
-
Barcelona, Spain, July. ACM SIGARCH
-
Alexandre E. Eichenberger, David S. Davidson, and Santosh G. Abraham. Optimum modulo schedules for minimum register requirements. In International Conference on Supercomputing, pages 31-40, Barcelona, Spain, July 1995. ACM SIGARCH.
-
(1995)
International Conference on Supercomputing
, pp. 31-40
-
-
Eichenberger, A.E.1
Davidson, D.S.2
Abraham, S.G.3
-
6
-
-
0030211929
-
Optimal and near-optimal global register allocation using 0-1 integer programming
-
David W. Goodwin and Kent D. Wilken. Optimal and near-optimal global register allocation using 0-1 integer programming. Software-Practice and Experience, 1996.
-
(1996)
Software-Practice and Experience
-
-
Goodwin, D.W.1
Wilken, K.D.2
-
7
-
-
0028768026
-
Minimizing register requirements under resource-constrained rate-optimal software pipelining
-
San Jose, CA, November-December
-
R. Govindarajan, Erik R. Altman, and Guang R. Gao. Minimizing register requirements under resource-constrained rate-optimal software pipelining. In 27th Annual International Symposium on Microarchitecture, pages 85-94, San Jose, CA, November-December 1994.
-
(1994)
27th Annual International Symposium on Microarchitecture
, pp. 85-94
-
-
Govindarajan, R.1
Altman, E.R.2
Gao, G.R.3
-
11
-
-
2842533661
-
-
Silicon Graphics Computer Systems, January. Revision 3.1
-
Charles Price. MIPS IV Instruction Set. Silicon Graphics Computer Systems, January 1995. Revision 3.1.
-
(1995)
MIPS IV Instruction Set
-
-
Price, C.1
-
12
-
-
0002017307
-
Instruction-level parallel processing: History, overview, and prospective
-
B. R. Rau and Joseph A. Fisher. Instruction-level parallel processing: History, overview, and prospective. The Journal of Supercomputing (Special Issue on Instruction-Level Parallelism), 7(l/2):9-50, 1993.
-
(1993)
The Journal of Supercomputing (Special Issue on Instruction-Level Parallelism)
, vol.7
, Issue.1-2
, pp. 9-50
-
-
Rau, B.R.1
Fisher, J.A.2
-
13
-
-
84947769987
-
Some scheduling techniques and a easily schedu-lable horizontal architecture for high-performance scientific programming
-
October
-
B. R. Rau and Joseph A. Fisher. Some scheduling techniques and a easily schedu-lable horizontal architecture for high-performance scientific programming. In IEEE/ACM l4th Annual Microprogramming Workshop, October 1993.
-
(1993)
IEEE/ACM l4th Annual Microprogramming Workshop
-
-
Rau, B.R.1
Fisher, J.A.2
-
14
-
-
0029719956
-
Software pipelining showdown: Optimal vs heuristic methods in a production compiler
-
Philadelphia, PA, May. ACM SIGPLAN
-
John C. Ruttenberg, Guang R. Gao, Artour Stoutchinin, and Woody Lichtenstein. Software pipelining showdown: Optimal vs heuristic methods in a production compiler. In Conference on Programming Language Design and Implementation, pages 1-11, Philadelphia, PA, May 1996. ACM SIGPLAN.
-
(1996)
Conference on Programming Language Design and Implementation
, pp. 1-11
-
-
Ruttenberg, J.C.1
Gao, G.R.2
Stoutchinin, A.3
Lichtenstein, W.4
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