Efficient self-reconfigurable implementations using on-chip memory

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1896, Issue , 2000, Pages 443-448

  Wadhwa, Sameer ^a   Dandalis, Andreas ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84947584904     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44614-1_47     Document Type: Conference Paper

References (8)

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3. A. Dandalis, A. Mei, and V. K. Prasanna. Domain specific mapping for solving graph problems on reconfigurable devices. In sixth IEEE Reconfigurable Architectures Workshop, April 1999.
4. A. Donlin. Self modifying circuitry - a platform for tractable virtual circuitry. In Eighth International Workshop on Field Programmable Logic and Applications, 1998.
5. P. C. French and R. W. Taylor. A self-reconfiguring processor. In Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, pages 50–59, April 1993.
6. J.R. Koza, F.H. Bennett III, and J.L. Hutchings. Evolving sorting networls using genetic programming and the rapidly reconfigurable xilinx 6216 field-programmable gate array. In FPGA’98 Sixth International Symposium on Field Programmable Gate Arrays, February 1998.
7. R. P. S. Sidhu, A. Mei, and V. K. Prasanna. Genetic programming with self-reconfigurable fpgas. In InternationalWorkshop on Field Programming Logic and Applications, August 1998.
8. R. P. S. Sidhu, A. Mei, and V. K. Prasanna. String matching on multicontext fpgas using self-reconfiguration. In ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pages 217–226, Monterey, CA, February 1999.