Reconfigurable network processors based on field programmable system level integrated circuits

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1896, Issue , 2000, Pages 39-47

  Iliopoulos, Marios ^a   Antonakopoulos, Theodore ^a  

^a UNIVERSITY OF PATRAS   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; INTEGRATED CIRCUITS; INTERNET PROTOCOLS; QUALITY OF SERVICE; RECONFIGURABLE ARCHITECTURES; TIMING CIRCUITS;

ACCESS PROTOCOLS; DEDICATED HARDWARE; FIELD PROGRAMMABLE SYSTEM LEVEL INTEGRATED CIRCUITS; MEDIUM ACCESS PROTOCOL; NETWORK PROCESSOR; NETWORKING APPLICATIONS; PROGRAMMABLE CORES; RECONFIGURABLE NETWORK;

RECONFIGURABLE HARDWARE;

EID: 84947553259     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44614-1_5     Document Type: Conference Paper

References (4)

1. Nicholas, Cravotta, Network processors: The Sky’s the Limit, EDN Magazine, November 1999, pages 108-119.
2. ATMEL, AT94 Series Field Programmable System Level Integrated Circuit, Advance Information.
3. Marios Iliopoulos, Theodore Antonakopoulos, A Methodology of Implementing Medium Access Protocols Using a General Parameterized Architecture, 11th IEEE International Workshop on Rapid System Prototyping, June 2000, France.
4. ANSI/IEEE Std 802.3-1996: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) access method and physical layer specifications