A Hierarchical sparse matrix storage format for vector processors

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003

Volumn , Issue , 2003, Pages

  Stathis, Pyrrhos ^a   Vassiliadis, Stamatis ^a   Cotofana, Sorin ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAY PROCESSING; DISTRIBUTED PARAMETER NETWORKS; FLEXIBLE STRUCTURES; PARALLEL PROCESSING SYSTEMS;

HIERARCHICAL SPARSE MATRIXES; INSERTION OPERATIONS; SPARSE MATRICES; SPARSE MATRIX-VECTOR MULTIPLICATION; STORAGE FORMATS; STORAGE SPACES; VECTOR ARCHITECTURES; VECTOR PROCESSORS;

VECTORS;

EID: 84947242005     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213156     Document Type: Conference Paper

References (12)

1. H. Amano, T. Boku, T. Kudoh, and H. Aiso. (SM)2-II: A new version of the sparse matrix solving machine. In Proceedings of the 12th Annual International Symposium on Computer Architecture, pages 100-107, Boston, Massachusetts, June 17-19, 1985. IEEE Computer Society TCA and ACM SIGARCH.
2. K. Asanovic and D. Johnson. Torrent architecture manual. Technical Report CSD-97-930, University of California, Berkeley, Jan. 24, 1997.
3. R. F. Boisvert, R. Pozo, K. Remington, R. Barrett, and J. J. Dongarra. The Matrix Market: A web resource for test matrix collections. In R. F. Boisvert, editor, Quality of Numerical Software, Assessment and Enhancement, pages 125-137, London, 1997. Chapman & Hall.
4. D. C. Burger and T. M. Austin. The simplescalar tool set, version 2. 0. Technical Report CS-TR-1997-1342, University of Wisconsin, Madison, June 1997.
5. S. E. Computer implementation of the finite-element procedure. In ONR Symposium on numerical and computer methods in structural mechanics, 1971.
6. J. L. Hennessy and D. A. Patterson. Computer Architecture A Quantative Approach. Morgan Kaufman, San Mateo, California, 1990.
7. R. N. Ibbett, T. M. Hopkins, and K. I. M. McKinnon. Architectural mechanisms to support sparse vector processing. In Proceedings of the 16th ASCI, pages 64-71, Jerusalem, Israel, June 1989. IEEE Computer Society Press.
8. A. Padegs, B. B. Moore, R. M. Smith, and W. Buchholz. The IBM System/370 vector architecture: Design considerations. IEEE Transactions on Computers, 37:509-520, 1988.
9. Y. Saad. SPARSKIT: A basic tool kit for sparse matrix computations. Technical report, Computer Science Department, University of Minnesota, Minneapolis, MN 55455, June 1994. Version 2.
10. V. E. Taylor, A. Ranade, and D. G. Messerschitt. SPAR: A New Architecture for Large Finite Element Computations. IEEE Transactions on Computers, 44(4):531-545, April 1995.
11. S. Vassiliadis, S. Cotofana, and P. Stathis. Vector isa extension sprase matrix multiplication. In EuroPar'99 Parallel Processing, Lecture Notes in Computer Science, No. 1685, pages 708-715. Springer-Verlag, 1999.
12. S. Vassiliadis, S. Cotofana, and P. Stathis. Block based compression storage expected performance. In Proceedings of HPCS2000, Victoria, pages 389-406, 2000.