-
2
-
-
0026977028
-
Automatic gate-level synthesis of speed-independent circuits
-
IEEE Computer Society Press, November
-
P. Beerel and T.H.-Y. Meng. Automatic gate-level synthesis of speed-independent circuits. In Proc. International Conf. Computer-Aided Design (ICCAD), pages 581-587. IEEE Computer Society Press, November 1992.
-
(1992)
Proc. International Conf. Computer-Aided Design (ICCAD)
, pp. 581-587
-
-
Beerel, P.1
Meng, T.H.2
-
3
-
-
0026913667
-
Symbolic boolean manipulation with ordered binary-decision diagrams
-
September
-
R. Bryant. Symbolic boolean manipulation with ordered binary-decision diagrams. ACM Computing Surveys, 24(3):293-318, September 1992.
-
(1992)
ACM Computing Surveys
, vol.24
, Issue.3
, pp. 293-318
-
-
Bryant, R.1
-
5
-
-
0023012638
-
Synthesis of self-timed control circuits form graphs: An example
-
IEEE Computer Society Press
-
T.-A. Chu and L. A. Glasser. Synthesis of self-timed control circuits form graphs: An example. In Proc. International Conf. Computer Design (ICCD), pages 565-571. IEEE Computer Society Press, 1986.
-
(1986)
Proc. International Conf. Computer Design (ICCD)
, pp. 565-571
-
-
Chu, T.-A.1
Glasser, L.A.2
-
7
-
-
0032595821
-
Decomposition and technology mapping of speed-independent circuits using Boolean relations
-
September
-
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, and Alexandre Yakovlev. Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Transactions on Computer-Aided Design, 18(9), September 1999.
-
(1999)
IEEE Transactions on Computer-Aided Design
, vol.18
, Issue.9
-
-
Cortadella, J.1
Kishinevsky, M.2
Kondratyev, A.3
Lavagno, L.4
Pastor, E.5
Yakovlev, A.6
-
8
-
-
0003652907
-
Automatic handshake expansion and reshu_ing using concurrency reduction
-
June
-
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Automatic handshake expansion and reshu_ing using concurrency reduction. In Proc. of the Workshop Hardware Design and Petri Nets (within the International Conference on Application and Theory of Petri Nets), pages 86-110, June 1998.
-
(1998)
Proc. Of the Workshop Hardware Design and Petri Nets (Within the International Conference on Application and Theory Of Petri Nets)
, pp. 86-110
-
-
Cortadella, J.1
Kishinevsky, M.2
Kondratyev, A.3
Lavagno, L.4
Yakovlev, A.5
-
9
-
-
0010646357
-
Deriving Petri nets from finite transition systems
-
August
-
Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, and Alexandre Yakovlev. Deriving Petri nets from finite transition systems. IEEE Transactions on Computers, 47(8):859-882, August 1998.
-
(1998)
IEEE Transactions on Computers
, vol.47
, Issue.8
, pp. 859-882
-
-
Cortadella, J.1
Kishinevsky, M.2
Lavagno, L.3
Yakovlev, A.4
-
10
-
-
0008862067
-
An introduction to asynchronous circuit design
-
A. Kent and J. G. Williams, editors, Marcel Dekker, New York, February
-
Al Davis and Steven M. Nowick. An introduction to asynchronous circuit design. In A. Kent and J. G. Williams, editors, The Encyclopedia of Computer Science and Technology, volume 38. Marcel Dekker, New York, February 1998.
-
(1998)
The Encyclopedia of Computer Science and Technology
, vol.38
-
-
Al, D.1
Nowick, S.M.2
-
12
-
-
0030533613
-
The synthesis problem of Petri nets
-
J. Desel and W. Reisig. The synthesis problem of Petri nets. Acta Informatica, 33(4):297-315, 1996.
-
(1996)
Acta Informatica
, vol.33
, Issue.4
, pp. 297-315
-
-
Desel, J.1
Reisig, W.2
-
13
-
-
0003889387
-
Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits
-
MIT Press
-
David L. Dill. Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits. ACM Distinguished Dissertations. MIT Press, 1989.
-
(1989)
ACM Distinguished Dissertations
-
-
Dill, D.L.1
-
15
-
-
0001282737
-
Using partial orders to improve automatic veri_cation methods
-
E.M Clarke and R.P. Kurshan, editors, 1990. DIMACS Series in Discrete Mathematica and Theoretical Computer Science
-
P. Godefroid. Using partial orders to improve automatic veri_cation methods. In E.M Clarke and R.P. Kurshan, editors, Proc. International Workshop on Com-puter Aided Verification 1990. DIMACS Series in Discrete Mathematica and Theoretical Computer Science, 1991, pages 321-340.
-
(1991)
Proc. International Workshop on Com-Puter Aided Verification
, pp. 321-340
-
-
Godefroid, P.1
-
17
-
-
2342418657
-
An algorithm for exact bounds on the time separation of events in concurrent systems
-
November
-
H. Hulgaard, S. M. Burns, T. Amon, and G. Borriello. An algorithm for exact bounds on the time separation of events in concurrent systems. IEEE Transactions on Computers, 44(11):1306-1317, November 1995.
-
(1995)
IEEE Transactions on Computers
, vol.44
, Issue.11
, pp. 1306-1317
-
-
Hulgaard, H.1
Burns, S.M.2
Amon, T.3
Borriello, G.4
-
19
-
-
0031700719
-
Analysis of Petri nets by ordering relations in reduced unfoldings
-
January
-
Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, and Sergei Ten. Analysis of Petri nets by ordering relations in reduced unfoldings. Formal Methods in System Design, 12(1):5-38, January 1998.
-
(1998)
Formal Methods in System Design
, vol.12
, Issue.1
, pp. 5-38
-
-
Kondratyev, A.1
Kishinevsky, M.2
Taubin, A.3
Ten, S.4
-
20
-
-
0032167091
-
Hazard-free implementation of speed-independent circuits
-
September
-
Alex Kondratyev, Michael Kishinevsky, and Alex Yakovlev. Hazard-free implementation of speed-independent circuits. IEEE Transactions on Computer-Aided Design, 17(9):749-771, September 1998.
-
(1998)
IEEE Transactions on Computer-Aided Design
, vol.17
, Issue.9
, pp. 749-771
-
-
Kondratyev, A.1
Kishinevsky, M.2
Yakovlev, A.3
-
21
-
-
0345340016
-
A Polynomial Algorithm to Compute the Concurrency Relation of a Regular STG
-
A. Yakovlev, L. Gomesa, and L. Lavagno, editors, Kluwer Academic Publishers, March
-
A. Kovalyov. A Polynomial Algorithm to Compute the Concurrency Relation of a Regular STG. In A. Yakovlev, L. Gomesa, and L. Lavagno, editors, Hardware Design and Petri Nets, pages 107-126. Kluwer Academic Publishers, March 2000.
-
(2000)
Hardware Design and Petri Nets
, pp. 107-126
-
-
Kovalyov, A.1
-
25
-
-
78049442327
-
A method for synthesizing sequential circuits
-
G.H. Mealy. A method for synthesizing sequential circuits. Bell System Technical J., 34(5):1045-1079, 1955.
-
(1955)
Bell System Technical J
, vol.34
, Issue.5
, pp. 1045-1079
-
-
Mealy, G.H.1
-
26
-
-
0002703887
-
Gedanken experiments on sequential machines
-
E.F. Moore. Gedanken experiments on sequential machines. Automata Studies, pages 129-153, 1956.
-
(1956)
Automata Studies
, pp. 129-153
-
-
Moore, E.F.1
-
29
-
-
0024645936
-
Petri Nets: Properties, analysis and applications
-
April
-
T. Murata. Petri Nets: Properties, analysis and applications. Proceedings of the IEEE, pages 541-580, April 1989.
-
(1989)
Proceedings of the IEEE
, pp. 541-580
-
-
Murata, T.1
-
30
-
-
0027617937
-
Synthesis of timed asynchronous circuits
-
June
-
Chris J. Myers and Teresa H.-Y. Meng. Synthesis of timed asynchronous circuits. IEEE Transactions on VLSI Systems, 1(2):106-119, June 1993.
-
(1993)
IEEE Transactions on VLSI Systems
, vol.1
, Issue.2
, pp. 106-119
-
-
Myers, C.J.1
Meng, T.H.-Y.2
-
31
-
-
84947218136
-
Automated design of high-performance asynchronous state machines
-
IEEE Computer Society Press, October
-
S. M. Nowick and B. Coates. Automated design of high-performance asynchronous state machines. In Proc. International Conf. Computer Design (ICCD). IEEE Computer Society Press, October 1994.
-
Proc. International Conf. Computer Design (ICCD)
, pp. 1994
-
-
Nowick, S.M.1
Coates, B.2
-
32
-
-
84958984213
-
Structural methods to improve the symbolic analysis of Petri nets
-
Lecture Notes in Computer Science, June
-
E. Pastor, J. Cortadella, and M.A. Peña. Structural methods to improve the symbolic analysis of Petri nets. In Application and Theory of Petri Nets 1999, Lecture Notes in Computer Science, June 1999.
-
(1999)
Application and Theory of Petri Nets 1999
-
-
Pastor, E.1
Cortadella, J.2
Peña, M.A.3
-
33
-
-
0032202597
-
Structural methods for the synthesis of speed-independent circuits
-
November
-
33] Enric Pastor, Jordi Cortadella, Alex Kondratyev, and Oriol Roig. Structural methods for the synthesis of speed-independent circuits. IEEE Transactions on Computer-Aided Design, 17(11):1108-1129, November 1998.
-
(1998)
IEEE Transactions on Computer-Aided Design
, vol.17
, Issue.11
, pp. 1108-1129
-
-
Pastor, E.1
Cortadella, J.2
Kondratyev, A.3
Roig, O.4
-
34
-
-
0004068620
-
-
PhD thesis, Bonn, Institut für Instrumentelle Mathematik, technical report Schriften des IIM Nr. 3)
-
C. A. Petri. Kommunikation mit Automaten. PhD thesis, Bonn, Institut für Instrumentelle Mathematik, 1962. (technical report Schriften des IIM Nr. 3).
-
(1962)
Kommunikation Mit Automaten
-
-
Petri, C.A.1
-
37
-
-
84956869194
-
Verification of asynchronous circuits by BDD-based model checking of Petri nets
-
Oriol Roig, Jordi Cortadella, and Enric Pastor. Verification of asynchronous circuits by BDD-based model checking of Petri nets. In 16th International Confer-ence on the Application and Theory of Petri Nets, volume 815 of Lecture Notes in Computer Science, pages 374-391, 1995.
-
(1995)
16Th International Confer-Ence on the Application and Theory of Petri Nets, Volume 815 of Lecture Notes in Computer Science
, pp. 374-391
-
-
Roig, O.1
Cortadella, J.2
Pastor, E.3
-
39
-
-
0003047591
-
Stubborn sets for reduced state space generation
-
Advances in Petri Nets 1990, Springer Verlag
-
A. Valmari. Stubborn sets for reduced state space generation. In Lecture Notes in Computer Science, Advances in Petri Nets 1990, volume 483, pages 491-515. Springer Verlag, 1991.
-
(1991)
Lecture Notes in Computer Science
, vol.483
, pp. 491-515
-
-
Valmari, A.1
|