Mapping of DSP algorithms on the MONTIUM architecture

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003

Volumn , Issue , 2003, Pages

  Heysters, Paul M ^a   Smit, Gerard J M ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DIGITAL SIGNAL PROCESSING; DISTRIBUTED PARAMETER NETWORKS; ENERGY EFFICIENCY; MAPPING; MOBILE DEVICES; SIGNAL PROCESSING;

AVAILABLE ENERGY; DIGITAL SIGNAL PROCESSING ALGORITHMS; DSP ALGORITHM; ENERGY EFFICIENT; HIGH PERFORMANCE ARCHITECTURES; MONTIUM; PROCESSING POWER; PROGRAMMABLE SYSTEMS;

RECONFIGURABLE ARCHITECTURES;

EID: 84947225565     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213333     Document Type: Conference Paper

References (7)

1. 3GPP TSG RAN WG1: "TS 25. 212 Multiplexing and Channel Coding (FDD) V3. 1. 1 (1999-12)", http://www. 3GPP. org.
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4. http://www. ee. ucla. edu/~schaum/ee201a/jpeg-c-fix/dct-8c-source. html.
5. Heysters P. M., Bouma H., et al. : "A Reconfigurable Function Array Architecture for 3G and 4G Wireless Terminals", Proceedings of World Wireless Congress, pages 399-404, San Francisco, USA, May 2002.
6. Heysters P. M., Smit L. T., et al. : "Max-Log-MAP Mapping on an FPFA", Proceedings of Engineering of Reconfigurable Systems and Algorithms, pages 90-96, Las Vegas, USA, June 2002.
7. Smit G. J. M., Havinga P. J. M., et al. : "Dynamic Reconfiguration in Mobile Systems", Proceedings of Field-Programmable Logic and Applications, pages 171-181, Montpellier, Fance, September 2002.