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Volumn 2015-April, Issue , 2015, Pages 269-272

Reducing energy consumption in microcontroller-based platforms with low design margin co-processors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COPROCESSOR; ENERGY CONSERVATION; ENERGY UTILIZATION; INTEGRATED CIRCUIT DESIGN; MICROCONTROLLERS; SENSITIVITY ANALYSIS; SIMULATION PLATFORM;

EID: 84945937567     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2015.1013     Document Type: Conference Paper
Times cited : (10)

References (16)
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  • 2
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  • 3
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    • Quantified impacts of guardband reduction on design process outcomes
    • K. Jeong, A. B. Kahng, and K. Samadi, Quantified Impacts of Guardband Reduction on Design Process Outcomes, in IEEE ISQED, 2008
    • (2008) IEEE ISQED
    • Jeong, K.1    Kahng, A.B.2    Samadi, K.3
  • 5
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    • EnergySmart: Toward energy-efficient manycores for near-threshold computing
    • U. R. Karpuzcu, A. Sinkar, N. S. Kim, and J. Torrellas, EnergySmart: Toward Energy-efficient Manycores for Near-Threshold Computing, in ACM HPCA, 2013
    • (2013) ACM HPCA
    • Karpuzcu, U.R.1    Sinkar, A.2    Kim, N.S.3    Torrellas, J.4
  • 6
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    • Performing flexible control on lowcost microcontrollers using a minimal real-time kernel
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  • 7
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    • Lpc4300 platform website. [Online]. Available: http://www.nxp.com/ products/microcontrollers/cortex-m4/series/LPC4300.html
  • 9
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    • VirtualSoC: A full-system simulation environment for massively parallel heterogeneous system-on-chip
    • D. Bortolotti, C. Pinto, A. Marongiu, M. Ruggiero, and L. Benini, VirtualSoC: A Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip, in IEEE IPDPSW, 2013
    • (2013) IEEE IPDPSW
    • Bortolotti, D.1    Pinto, C.2    Marongiu, A.3    Ruggiero, M.4    Benini, L.5
  • 11
    • 47349118686 scopus 로고    scopus 로고
    • A practical approach to exploiting coarse-grained pipeline parallelism in c programs
    • W. Thies, V. Chandrasekhar, and S. Amarasinghe, A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs, in MICRO. IEEE, 2007
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  • 12
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    • A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessors
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.