PAPI deployment, evaluation, and extensions

Proceedings - 2003 User Group Conference

Volumn , Issue , 2003, Pages 349-353

  Moore, S ^a   Terpstra, D ^a   London, K ^a   Mucci, P ^a   Teller, P ^b   Salayandia, L ^b   Bayona, A ^b   Nieto, M ^b  

^a UNIVERSITY OF TENNESSEE   (United States)

^b UNIVERSITY OF TEXAS AT EL PASO   (United States)

Author keywords

Counting circuits; Debugging; Hardware; Measurement; Microprocessors; Monitoring; Performance analysis; Registers; Signal processing; Statistics

Indexed keywords

COMPUTER DEBUGGING; COMPUTER HARDWARE; COUNTING CIRCUITS; HARDWARE; MEASUREMENTS; MICROPROCESSOR CHIPS; MONITORING; SIGNAL PROCESSING; STATISTICS;

APPLICATION DEVELOPMENT; APPLICATION PERFORMANCE; HARDWARE PERFORMANCE COUNTERS; MODERN MICROPROCESSOR; PERFORMANCE ANALYSIS; PERFORMANCE COUNTERS; PERFORMANCE METRICS; REGISTERS;

BENCHMARKING;

EID: 84945128980     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DODUGC.2003.1253415     Document Type: Conference Paper

References (13)

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9. PowerPC TM Microprocessor Family: The Programming Environments for 32-Bit Microprocessors. G522-0290-01. 02/21/2000.
10. Saavedra, R., and A. J. Smith, "Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes," IEEE Transactions on Computers, 44:10, October 1995.
11. Salayandia, L., A Study of the Validity and Utility of PAPI Performance Counter Data, Master's Thesis, Department of Computer Science, The University of Texas at El Paso, December 2002.
12. Tuning and Analysis Utilities (TAU) website, http://www.cs.uoregon.edu/research/paracomp/tau/papers.html
13. Vampir website, http://www.pallas.com/