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Volumn , Issue , 2003, Pages 294-302
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A VLIW architecture for logarithmic arithmetic
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Author keywords
[No Author keywords available]
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Indexed keywords
ARCHITECTURE;
DIGITAL ARITHMETIC;
NUMBER THEORY;
NUMBERING SYSTEMS;
SYSTEMS ANALYSIS;
HIDDEN COSTS;
IEEE-754 STANDARD;
IMPROVE PERFORMANCE;
INSTRUCTION SET ARCHITECTURE;
LOGARITHMIC ARITHMETIC;
LOGARITHMIC NUMBER SYSTEM;
MULTIPLY ACCUMULATE;
VERY LONG INSTRUCTION WORDS;
VERY LONG INSTRUCTION WORD ARCHITECTURE;
ALGORITHMS;
COMPUTATION;
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EID: 84944312074
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/DSD.2003.1231957 Document Type: Conference Paper |
Times cited : (11)
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References (12)
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