Efficient distributed arithmetic based DWT architecture for multimedia applications

Proceedings - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2003

Volumn , Issue , 2003, Pages 333-336

  Alam, M ^a   Rahman, C A ^a   Badawy, W ^a   Jullien, G ^b  

^a UNIVERSITY OF CALGARY   (Canada)

^b UNIVERSITY OF CALGARY   (Canada)

Author keywords

Arithmetic; Clocks; Computational complexity; Computer architecture; Discrete wavelet transforms; Filters; Frequency; Hardware; Throughput; Voltage

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CLOCKS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DIGITAL ARITHMETIC; ELECTRIC POTENTIAL; FILTER BANKS; FILTERS (FOR FLUIDS); HARDWARE; MATRIX ALGEBRA; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; THROUGHPUT; WAVELET TRANSFORMS;

BIORTHOGONAL WAVELET; COEFFICIENT MATRIX; DISTRIBUTED ARITHMETIC; FREQUENCY; HARDWARE COMPLEXITY; MULTIMEDIA APPLICATIONS; PROCESSING ELEMENTS; PROPOSED ARCHITECTURES;

DISCRETE WAVELET TRANSFORMS;

EID: 84944079623     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2003.1213058     Document Type: Conference Paper

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