Novel dissoluble hardmask for damage-less Cu/low-k interconnect fabrication

Proceedings of the IEEE 2003 International Interconnect Technology Conference, IITC 2003

Volumn , Issue , 2003, Pages 195-197

  Furusawa, T ^a   Machida, S ^a   Ryuzaki, D ^a   Sameshima, K ^a   Ishida, T ^a   Ishikawa, K ^a   Miura, N ^a   Konishi, N ^a   Saito, T ^a   Yamaguchi, H ^a  

^a HITACHI LTD   (Japan)

Author keywords

Cleaning; Dielectric materials; Dry etching; Fabrication; Integrated circuit interconnections; Plasma applications; Plasma materials processing; Resists; Sputter etching; Wet etching

Indexed keywords

CLEANING; DIELECTRIC MATERIALS; DRY ETCHING; FABRICATION; PHOTORESISTS; PLASMA APPLICATIONS; WET ETCHING;

ASHING DAMAGE; DUAL DAMASCENE PROCESS; INTEGRATED CIRCUIT INTERCONNECTIONS; MASK PROCESS; PLASMA MATERIALS-PROCESSING; RESISTS; SPUTTER ETCHING; WET CLEANING;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 84944073935     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2003.1219752     Document Type: Conference Paper

References (3)

1. T. Furusawa et. al, Symp. on VLSI Tech, pp. 59 (1995)
2. Y. C. Yue et. al., Proc. of IITC, pp.9 (2002)
3. K. Higashi et. al., Proc. of IITC, pp.15 (2002)