Viterbi decoding on a co-processor architecture with vector parallelism

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn 2003-January, Issue , 2003, Pages 334-339

  Engin, N ^a   Van Berkel, K ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

3G mobile communication; Baseband; Convolution; Convolutional codes; Coprocessors; Decoding; Kernel; Mobile handsets; Throughput; Viterbi algorithm

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; CONVOLUTION; CONVOLUTIONAL CODES; DECODING; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MOBILE TELECOMMUNICATION SYSTEMS; PARALLEL PROCESSING SYSTEMS; SIGNAL PROCESSING; THROUGHPUT; VECTORS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

3G MOBILE COMMUNICATION; BASE BANDS; CO-PROCESSORS; KERNEL; MOBILE HANDSETS;

VITERBI ALGORITHM;

EID: 84943237908     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2003.1235692     Document Type: Conference Paper

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