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Volumn , Issue , 1993, Pages 46-51
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Design and evaluation of Tapped-Delay Neural Network architectures
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER ARCHITECTURE;
ERROR ANALYSIS;
PROBABILITY;
NEURAL NETWORKS;
OPTIMAL BRAIN DAMAGE METHOD;
PREDICTION ERRORS;
NEURAL NETWORKS;
NETWORK ARCHITECTURE;
DESIGN AND EVALUATIONS;
FINAL PREDICTION ERRORS;
GENERALIZATION ABILITY;
HIGH YIELD;
OPTIMAL BRAIN DAMAGES;
PRUNING ALGORITHMS;
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EID: 84943236576
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (38)
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References (11)
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