Assessment of the impact of biaxial strain on the drain current of decanometric n-MOSFET

ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference

Volumn , Issue , 2006, Pages 166-169

  Ponton, D ^a   Lucci, L ^a   Palestri, P ^a   Esseni, D ^a   Selmi, L ^a  

^a UNIVERSITY OF UDINE   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENT; MONTE CARLO METHODS; SCATTERING PARAMETERS; STRAIN MEASUREMENT;

BIAXIAL STRAIN; GATE ARCHITECTURE; SUBBAND STRUCTURE;

MOSFET DEVICES;

EID: 84943199928     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2006.307664     Document Type: Conference Paper

References (19)

1. International Technology Roadmap for Semiconductor, http://public.itrs.net.
2. J.Welser et al., "Strain dependence of the performance enhancement in Strained-Si n-MOSFETs," in IEDM, 1994, p. 373.
3. K.Rim et al., "Fabrication and analysis of deep submicron Strained-Si n-MOSFET's," IEEE Trans. Electron Devices, vol. 47, p. 1406, 2000.
4. M.Lundstrom, "Elementary Scattering Theory of the Si MOSFET," IEEE Electron Device Lett., vol. 18, p. 361, 1997.
5. J.S. Goo et. al., "Scalability of Strained-Si nMOSFETs Down to 23 nm Gate Length," IEEE Electron Device Lett., vol. 24, p. 351, 2003.
6. J.Cai et al., "Performance Comparison and Channel Length Scaling of Strained Si FETs on SiGe-on-Insulator (SGOI)," in IEDM, 2004, p. 165.
7. T.Sanuki et. al., "Scalability of Strained Silicon CMOSFET and High Drive Current Enhancement in the 40nm Gate Length Technology," in IEDM, 2003, p. 65.
8. P.Palestri et al., "Understanding Quasi-Ballistic Transport in nano-MOSFETs. Part I: Scattering in the Channel and in the Drain," IEEE Trans. Electron Devices, vol. 52, p. 2727, 2005.
9. M.V.Fischetti and S.E.Laux, "Monte Carlo study of electron transport in silicon inversion layers," Phys. Rev. B, vol. 48, p. 2244, 1993.
10. C.Jungemann et al., "Simulation of Linear and Nonlinear Electron Transport in Homogeneous Silicon Inversion Layers," Solid State Elect., vol. 36, p. 1529, 1993.
11. F.Gamiz et al., "Monte Carlo Simulation of Electron Transoprt Properties in Extremely Thin SOI MOSFET's," IEEE Trans. Electron Devices, vol. 45, p. 1122, 1998.
12. L. Lucci et al., "Multi-subband Monte Carlo modeling of nano-MOSFETs with strong vertical quantization and electron gas degeneration," in IEDM, 2005, p. 631.
13. L.Lucci et al., "Modeling the Uniform Transport in Thin Film SOI MOSFETs with a Monte-Carlo Simulator for the 2D Electron Gas," Solid State Elect., vol. 49, p. 1529, 2005.
14. D.Esseni et al., "Physically Based Modeling of Low Field Electron Mobility in Ultra-Thin Single and Double-Gate SOI n-MOSFETs." IEEE Trans. Electron Devices, vol. 50, p. 2445, 2003.
15. M.Rashed et al., "Monte Carlo Simulation of Electron Transport in Strained Si/Si1-xGex n-MOSFETs," in IEDM, 1995, p. 765.
16. S.Takagi et al., "On the Universality of Inversion-layer Mobilty in Si MOSFETs. Part I- Effect of Substrate Impurity Concentration," IEEE Trans. Electron Devices, vol. 41, p. 2357, 1994.
17. M.V.Fischetti et al., "On the enhanced electron mobility in strained-Silicon inversion layers," Jour. App. Phys., vol. 92, p. 7320, 2002.
18. M.H.Evans et al., "First-Principles Modeling of Double-Gate UTSOI MOSFETs," in IEDM, 2005, p. 611.
19. M.De Michielis et al., "Trade-off between Electron Velocity and Density of States in Ballistic nano-MOSFETs," in ESSDERC, 2005, p. 165.