Performance analysis of fixed, reconfigurable, and custom architectures for the SCAN image and video encryption algorithm

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2003-January, Issue , 2003, Pages 19-28

  Dollas, A ^a   Kachris, C ^a   Bourbakis, N ^b  

^a TECHNICAL UNIVERSITY OF CRETE   (Greece)

^b WRIGHT STATE UNIVERSITY   (United States)

Author keywords

Algorithm design and analysis; Application specific integrated circuits; Computer architecture; Cryptography; Hardware; NIST; Performance analysis; Reconfigurable architectures; Reconfigurable logic; Software algorithms

Indexed keywords

ALGORITHMS; APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATION THEORY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTERS; CRYPTOGRAPHY; HARDWARE; INTEGRATED CIRCUITS; RECONFIGURABLE HARDWARE;

ALGORITHM DESIGN AND ANALYSIS; NIST; PERFORMANCE ANALYSIS; RECONFIGURABLE LOGIC; SOFTWARE ALGORITHMS;

RECONFIGURABLE ARCHITECTURES;

EID: 84942919757     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227238     Document Type: Conference Paper

References (25)

1. N. Bourbakis, C. Alexopoulos, Picture data encryption using SCAN patterns, Pattern Recognition Journal, vol. 25, no6, 1992, pp.576-581
2. S. Maniccam and N. Bourbakis, On compression and encryption for digital video, Int. ISCA Conf. on Parallel and Distributed Systems, pp. 652-657, Aug. 2000, NV, USA
3. J. Scharinger, Fast Encryption of image data using chaotic Kolmogorov Flows, Journal of Electronics Imaging vol. 17, no2 1998, pp318-325
4. L. Chang, Large encrypting of binary images with higher Security, Pattern Recognition Letters, vol. 19, no 5, 1998, pp461-168
5. X. Li, Image compression and encryption using tree structures, Pattern Recognition Letters, vol. 18, no11, 1997, pp 1253-1259
6. H. Chang, J. Liu, A linear quadtree compression scheme for image encryption, Signal Processing: Image communication, vol. 10, no 4, 1997, pp279-290
7. T. Chuang, J. Lin, New approach to image Encryption, Journal of Electronic Imaging, April 1998, pp350-6
8. T. Chuang, J. Lin, A new multiresolution approach to still image encryption, Pattern Recognition and Image Analysis, vol. 9, no3, 1999, pp431-439
9. J. Keller, A hardware-based attack on the A5/1 stream cipher, In Proc. APC 2001, München, Okt. 2001, pp. 155-158.
10. A. Biryukov, Real Time Cryptanalysis of A5/1 on a PC, Fast Software Encryption Workshop 2000, April 10-12, 2000, New York City.
11. National Institute of Standards and Technology, First Advanced Encryption Standard Conference, Ventura, CA, 1998
12. L. Quio, K. Nahrstedt, A new algorithm for MPEG Video encryption, First International Conference on Imaging Science, Systems and Technology, 1997, pp21-29
13. B. Schneier, Applied Cryptography, John Wiley & Sons Inc, 1993
14. B. Beckett, Introduction to Cryptology, Blackwell Scientific Publications, 1988
15. A. Dollas, D. Pnevmatikatos, Architecture and Applications of PLATO, a Reconfigurable Active Network Platform, IEEE Symposium on Field Programmable Custom Computing Machines, IEEE Computer Society Press, 2001.
16. G. Drost, N. Bourbakis, A hybrid system for real-time lossless image compression, Microprocessors and Microsystems 25 (2001), pp19-31
17. C. Alexopoulos, SCAN: An efficient data processing-accessing formal methodology, PhD thesis, Dept. of Computer Engineering and Informatics, University of Patras, 1989.
18. S.Maniccam, A Lossless compression, encryption and information hiding methodology for images and video, PhD thesis, Dept. ECE, Binghamton University, 2000
19. N. Bourbakis and C.Alexopoulos, A language for image processing: formal modeling, Pattern Recognition Journal, 32, 2, pp. 317-338, 1999.
20. A. Elbirt, C. Paar, An FPGA implementation and Performance Evaluation of the Serpent Block Cipher, FPGA 2000
21. V. Fischer, M. Drutarovsky, Two Methods of Rijndael Implementation in Reconfigurable Logic, CHES 2001, LNCS 2162, pp77-92
22. J. Kaps and C. Paar, Fast DES Implementations for FPGAs and its Application to a Universal Key-Search Machine," in 5th Annual Workshop on Selected Areas in Cryptography (SAC '98), vol. LNCS 1556, Springer-Verlag, August 1998.
23. E.Hong, J. Chung, C, Lim, Hardware Design and Performance Estimation of the 128-bit Block cipher CRYPTON, Workshop on Cryptographic Hardware and Embedded Systems '99, August 1999
24. T. Kean, A. Duncan, DES Key Braking, Encryption and Decryption on the XC6216, Proceedings, IEEE Symposium on FPGA's for Custom Computing Machines, p. 310, Napa valley, California, IEEE Computer Society Press, 1998.
25. C. Kachris, S. Manniccam, A.Dollas, N. Bourbakis, A Reconfigurable Logic-Based Processor for the SCAN Image and Video Algorithm, 1st Workshop on Application Specific Processors, International Workshop on Application Specific Processors, WASP1, November 19, 2002, Istanbul, Turkey.