Exploiting reconfigurable hardware for network security

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2003-January, Issue , 2003, Pages 292-293

  Li, Shaomeng ^a   Torresen, J ^a   Soraasen, O ^a  

^a UNIVERSITY OF OSLO   (Norway)

Author keywords

Application specific integrated circuits; Concurrent computing; Engines; Field programmable gate arrays; Hardware; Information security; Intrusion detection; Protocols; Reconfigurable logic; Software maintenance

Indexed keywords

APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATION THEORY; COMPUTER HARDWARE; COMPUTER SOFTWARE MAINTENANCE; COMPUTERS; ENGINES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; HARDWARE SECURITY; INTRUSION DETECTION; LOGIC GATES; MERCURY (METAL); NETWORK PROTOCOLS; RECONFIGURABLE HARDWARE; SECURITY OF DATA; SIGNAL RECEIVERS;

CONCURRENT COMPUTING; HIGHER SPEED; INTRUSION DETECTION SYSTEMS; NETWORK SECURITY STRATEGY; NOVEL HARDWARE; RECONFIGURABLE LOGIC; SPEED UP;

NETWORK SECURITY;

EID: 84942857445     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227276     Document Type: Conference Paper

References (7)

1. http://www.sans.org/newlook/resources/IDFAQ/.
2. http://www.snort.org.
3. Xilinx CAM Application Note.
4. A. DeHon. "Reconfigruable Architecture for General-Purpose Computing". MASSACHUSETTS INSTITUTE OF TECHNOLOGY, ARTIFICAL INTELLEGENCE LABORATORY, Technical Report.
5. N. Desai. "Increasing Performance in High Speed NIDS". 2002.
6. M. Gokhale et al. "Granidt: Towards Gigabit Rate Network Intrusion Detection Technology". in Proc. of 12th International Conference, FPL2002, France, Los Alamos National Laboratory, 2002.
7. C. Kruegel et al. "Automatic Rule Clustering for improved, signature based Intrusion Detection". University of California, Santa Barbara, 2002.