Efficient complex-number multipliers mapped on FPGA

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 1999, Pages 1123-1126

  Pascual, A P ^a   Valls, J ^a   Peiro M M ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS INDUSTRY;

AREA-EFFICIENT; BETTER PERFORMANCE; COMPLEX MULTIPLIERS; COMPLEX NUMBER; DIGIT-SERIAL; DISTRIBUTED ARITHMETIC; TIME-EFFICIENT; VLSI SYSTEM;

VLSI CIRCUITS;

EID: 84940561227     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.1999.813431     Document Type: Conference Paper

References (12)

1. Smith S.G., Denyer P.B., "Serial Data Computation", Kluwer Academic, Boston, MA, 1988.
2. Karlsson M., Vesterbacka M., Wanhanmmar L., "Design and Implementation of a Complex Multiplier using Distributed Arithmetic", IEEE Proceedings of Workshop on Signal Processing Systems, pp. 222-231, 1997.
3. Croisier A., Esteban D.J., Levilion, Riso V. "Digital Filter for PCM Encoded Signals", U.S. Patent 3777 130, Dec 1973.
4. Peled A., Liu B. "A New Hardware Realization of Digital Filters", IEEE Trans, on Acoust. Speech and Signal Processing", vol. ASSP-22, n° 6, pp.452-462, 1974.
5. Wolter S., Schubert A., "On the comparison between architectures for implementation of distributed arithmetic", Proceedings International Symposium on Circuits and System, 1993.
6. Sikstrom B., Wanhammar L., "A Shift-Accumulator for Signal Proceesing Applications", Proc. ECCTD-81, vol. l, n°l, pp.919-924, 1981.
7. Harley R., Corbet P., "Digit-serial processing techniques", IEEE Trans. On Circuits and Systems, vol. 37, n°6, pp. 707-719, June 1990.
8. Parhi K.K., "A systematic approach for design of digit-serial signal processing architectures", IEEE Trans. Circuits and Systems, vol.38, pp.358-375, April 1991.
9. Harley R.I., Parhi K.K., "Digit-serial Computation", Kluwer Academic, Boston, MA, 1995.
10. Villasenor J., Hutchyngs B., "The flexibility of configurable computing", IEEE S.P. Magazine, pp.67-84, Sept. 1998.
11. Vails J., Peiró M.M., Sansaloni T., Boemo E., "A Study about FPGA-based Digital Filters", IEEE Proceedings of Workshop on Signal Processing Systems, pp.192-201, 1998
12. Altera Data Book 1998