Simulation-Oriented Noise Model for MOS Devices

IEEE Journal of Solid-State Circuits

Volumn 22, Issue 6, 1987, Pages 1209-1212

  Nicollinl, Germano ^a   Pancin, Davide ^a   Pernici, Sergio ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84939356113     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1987.1052878     Document Type: Article

References (9)

1. L. W. Nagel, “SPICE2: A computer program to simulate semiconductor circuits,” Electron. Res. Lab., Univ. of Calif., Berkeley, ERL Memo M520, May 1975.
2. Y. Tsividis and G Masetti, “ Problems in precision modeling of the MOS transistor for analog applications,” IEEE Trans. Computer-Aided Des vol. CAD-3, no. 1, pp. 72–79, Jan. 1984.
3. P E. Allen and E. Sanchez-Sinencio, Switched Capacitors Circuits. New York: Van Nostrand Reinhold, 1984.
4. S. Christensson and I Lundstrom, “Low frequency noise in MOS transistors,” Solid-State Electron., vol. 11, pp. 813–820, 1968.
5. S. Yat-San Ng, “Characterization and measurement of 1/ f noise in MOS transistors,” M S. thesis, Univ of Calif., Berkeley, 1986
6. M. B. Das, “FET noise sources and their effects on amplifier performance at low frequency,” IEEE Trans. Electron Devices, vol. ED-19, pp. 338–348, Mar. 1972.
7. L. K. S. Vandamme, H. M. M. de Werd, “1/ f noise model for MOST's biased in nonohmic region,” Solid-State Electron., vol. 23, no. 4, pp. 325–329, 1980.
8. J. C Bertails, “Low-frequency noise considerations for MOS amplifier design,” IEEE J. Solid-State Circuits, vol. SC-14, pp 773–776, Aug. 1979.
9. K. Doganis and R. W. Dutton, “SUXES Stanford University extractor of model parameters,” Stanford Umv., Stanford, CA, Int. Tech. Rep., Nov 1982