A Microprogrammable Real-Time Video Signal Processor (VSP) LSI

IEEE Journal of Solid-State Circuits

Volumn 22, Issue 6, 1987, Pages 1117-1123

  Yamashina, Masakazu ^a   Enomoto, Tadayoshi ^a   Kunio, Takemitsu ^a   Tamitani, Ichiro ^a   Harasaki, Hidenobu ^a   Nishitani, Takao ^a   Satoh, Masao ^a   Kikuchi, Koichi ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84939355683     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1987.1052862     Document Type: Article

References (13)

1. T. Sudo, T. Nakashima, M. Aoki, and T. Kondoh, “An LSI adaptive array processor,” in ISSCC Dig. Tech. Papers, Feb. 1982, THAM10.2, pp. 122–123.
2. T. Fukushima, Y. Kobayashi, K. Hirasawa, and T. Bandoh, “An image signal processor,” in ISSCC Dig. Tech. Papers, Feb. 1983, FAM18.4, pp. 258–259.
3. T. Nukiyama, T. Kusano, H. Kurosawa, T. Hoshi, H. Goto, and T. Temma, “A VLSI image pipelined processor,” in ISSCC Dig. Tech. Papers, Feb. 1984, THPM14.5, pp. 208–209.
4. A. Kanuma et al., “A 20MHz 32b pipelined CMOS image processor,” in ISSCC Dig. Tech. Papers, Feb. 1986, WPM9.5, pp. 102–103.
5. T. Mori, K. Aono, H. Sakai, K. Hasegawa, H. Yamada, and T. Takemoto, “A microprogrammable realtime image processor,” in ISSCC Dig. Tech. Papers, Feb. 1986, THAM 12.1, pp. 144–145.
6. Y. Kobayashi et al., “A BiCMOS image signal processor with line memory,” in ISSCC Dig. Tech. Papers, Feb. 1987, THPM 15.2, pp. 182–183.
7. M. Yamashina et al., “A realtime microprogrammable video signal processor,” in ISSCC Dig. Tech. Papers, Feb. 1987, THPM 15.3, pp. 184–185.
8. T. Enomoto et al., “A microprogrammable realtime video signal processor (VSP) LSI for motion compensation and vector quantization,” in Proc. CICC, May 1987, pp. 303–306.
9. M. Yamashina et al., “A microprogrammable realtime video signal processor (VSP) LSI for motion compensation and vector quantization,” to be published in IEEE J. Solid-State Circuits, vol. SC-23, Apr. 1988.
10. H. Harasaki et al., “Realtime video signal processor module,” in Proc. ICASSP, Apr. 1987, pp. 1961–1964.
11. H, Harasaki et al., “A single-board video signal processor module employing newly developed LSI devices,” to be published in IEEE J. Selected Areas Commun.
12. I. Tamitani et al., “A realtime video signal processor suitable for motion picture coding application,” in Proc. GLOBCOM, Nov. 1987.
13. T. Nishitani, I. Tamitani, H. Harasaki, M. Yamashina, and T. Enomoto, “Video signal processor configuration by multiprocessor approach,” in Proc. ICASSP, Apr. 1986, pp. 797–800.