-
1
-
-
0016484745
-
An Introduction to array logic
-
Mar.
-
H. Fleisher and L. I. Maissel, “An Introduction to array logic,” IBM J. Res. Develop., vol. 19, pp. 98–109, Mar. 1975.
-
(1975)
IBM J. Res. Develop.
, vol.19
, pp. 98-109
-
-
Fleisher, H.1
Maissel, L.I.2
-
2
-
-
0016482950
-
Hardware implementation of a small system in programmable logic arrays
-
Mar.
-
J. C. Logue, N. F. Brickman, F. Howley, J. W. Jones, and W. W. Wu, “Hardware implementation of a small system in programmable logic arrays,” IBM J. Res. Develop., vol. 19, pp. 110–119, Mar. 1975.
-
(1975)
IBM J. Res. Develop.
, vol.19
, pp. 110-119
-
-
Logue, J.C.1
Brickman, N.F.2
Howley, F.3
Jones, J.W.4
Wu, W.W.5
-
3
-
-
84939362516
-
-
G. D. Hachtel, and A. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis. Norwell, MA: Kluwer Academic Publishers
-
R. K. Brayton, C. McMullen, G. D. Hachtel, and A. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis. Norwell, MA: Kluwer Academic Publishers, 1984.
-
(1984)
C. McMullen
-
-
Brayton, R.K.1
-
4
-
-
0021510779
-
Input variable assignment and output phase optimization of PLA's
-
Oct.
-
T. Sasao, “Input variable assignment and output phase optimization of PLA's,” IEEE Trans. Comput. C-33, pp. 879–894. Oct. 1984.
-
(1984)
IEEE Trans. Comput. C-33
, pp. 879-894
-
-
Sasao, T.1
-
5
-
-
0020112680
-
An algorithm for optimal PLA folding
-
Jan.
-
G. D. Hachtel, A. R. Newton, and A. Sangiovanni-Vincentelli, “An algorithm for optimal PLA folding,” IEEE Trans. Computer-Aided Design, vol. CAD-1, pp. 63–76, Jan. 1982.
-
(1982)
IEEE Trans. Computer-Aided Design
, vol.CAD-1
, pp. 63-76
-
-
Hachtel, G.D.1
Newton, A.R.2
Sangiovanni-Vincentelli, A.3
-
6
-
-
0020779530
-
Multiple constrained folding of programmable logic arrays: Theory and applications
-
July
-
G. De Micheli and A. Sangiovanni-Vincentelli, “Multiple constrained folding of programmable logic arrays: Theory and applications,” IEEE Trans. Computer-Aided Design, vol. CAD-2, pp. 151–167, 167, July 1983.
-
(1983)
IEEE Trans. Computer-Aided Design
, vol.CAD-2
, pp. 151-167
-
-
De Micheli, G.1
Sangiovanni-Vincentelli, A.2
-
8
-
-
0000316190
-
A way to simplify truth functions
-
Nov.
-
W. V. Quine, “A way to simplify truth functions,” Amer. Math. Mon., vol. 62, p. 627, Nov. 1955.
-
(1955)
Amer. Math. Mon.
, vol.62
, pp. 627
-
-
Quine, W.V.1
-
9
-
-
33845331515
-
Minimization of Boolean functions
-
Nov.
-
E. J. McCluskey, “Minimization of Boolean functions,” Bell Syst. Tech. J., vol. 35, pp. 1417–1444. Nov. 1956.
-
(1956)
Bell Syst. Tech. J.
, vol.35
, pp. 1417-1444
-
-
McCluskey, E.J.1
-
12
-
-
84893561614
-
Optimal state assignment for finite-state machines
-
July
-
G. De Micheli, R. K. Brayton, and A. Sangiovanni-Vincentelli, “Optimal state assignment for finite-state machines.” IEEE Trans. Computer-Aided Design, vol. CAD-4, pp. 269–285. July 1985.
-
(1985)
IEEE Trans. Computer-Aided Design
, vol.CAD-4
, pp. 269-285
-
-
De Micheli, G.1
Brayton, R.K.2
Sangiovanni-Vincentelli, A.3
-
14
-
-
0003612381
-
An application of multiple-valued logic to a design of programmable logic arrays
-
T. Sasao, “An application of multiple-valued logic to a design of programmable logic arrays,” in Proc. 18th Int. Symp Mult. Val. Logic, 1978.
-
(1978)
Proc. 18th Int. Symp Mult. Val. Logic
-
-
Sasao, T.1
-
15
-
-
0022012707
-
An algorithm to derive the complement of a binary function with multiple-valued inputs
-
IEEE Trans. Comput.
-
T. Sasao, “An algorithm to derive the complement of a binary function with multiple-valued inputs,- IEEE Trans. Comput., vol. C-34, Feb. 1985.
-
, vol.C-34
-
-
Sasao, T.1
-
16
-
-
0019609761
-
Multiple-valued decomposition of generalized Boolean functions and the complexity of programmable logic arrays
-
Sept.
-
T. Sasao, “Multiple-valued decomposition of generalized Boolean functions and the complexity of programmable logic arrays,” IEEE Trans. Comput., vol. C-30, pp. 635 -643, Sept. 1981.
-
(1981)
IEEE Trans. Comput.
, vol.C-30
, pp. 635-643
-
-
Sasao, T.1
-
17
-
-
0015403524
-
Computer minimization of multi-valued switching functions
-
Y. H. Su and P. T. Cheung. “Computer minimization of multi-valued switching functions,” IEEE Trans. Comput., vol. C-21, pp. 995–1003, 1972.
-
(1972)
IEEE Trans. Comput.
, vol.C-21
, pp. 995-1003
-
-
Su, Y.H.1
Cheung, P.T.2
-
18
-
-
0021004246
-
Tautology checking algorithms for multiple-valued input binary functions and their application
-
T. Sasao, “Tautology checking algorithms for multiple-valued input binary functions and their application,” in Proc. 14th Int. Symp. Mult. Val. Logic, 1984.
-
(1984)
Proc. 14th Int. Symp. Mult. Val. Logic
-
-
Sasao, T.1
-
20
-
-
0016102508
-
MINI: A heuristic approach for logic minimization
-
Sept.
-
S. J. Hong, R. G. Cain, and D. L. Ostapko, “MINI: A heuristic approach for logic minimization,” IBMJ J. Res. Develop., 443–458, Sept. 1974.
-
(1974)
IBMJ J. Res. Develop.
, pp. 443-458
-
-
Hong, S.J.1
Cain, R.G.2
Ostapko, D.L.3
-
21
-
-
84939331659
-
-
Testing, and Validation. Rockville, MD: Computer Science Press
-
J. P. Roth, Computer Logic, Testing, and Validation. Rockville, MD: Computer Science Press, 1980.
-
(1980)
Computer Logic
-
-
Roth, J.P.1
-
22
-
-
84939356458
-
Corrections and addition to input variable assignment and output phase optimization of PLA's
-
T. Sasao, “Corrections and addition to input variable assignment and output phase optimization of PLA's,” private communication.
-
private communication
-
-
Sasao, T.1
-
24
-
-
0022603258
-
McBoole: A new procedure for exact logic minimization
-
Jan.
-
M. R. Dagenais, V. K. Agarwal, and N. C. Rumin, “McBoole: A new procedure for exact logic minimization,” IEEE Trans. Computer-Aided Design, vol. CAD-5, pp. 229–238, Jan. 1986.
-
(1986)
IEEE Trans. Computer-Aided Design
, vol.CAD-5
, pp. 229-238
-
-
Dagenais, M.R.1
Agarwal, V.K.2
Rumin, N.C.3
-
25
-
-
84939324882
-
Comparison of minimization algorithms for multiple-valued expressions
-
T. Sasao, “Comparison of minimization algorithms for multiple-valued expressions,” Draft, 1982.
-
(1982)
Draft
-
-
Sasao, T.1
-
26
-
-
84943460199
-
Design decisions in SPUR
-
Nov.
-
R. Katz, et al., “Design decisions in SPUR,” COMPUTER, pp. 8- 22, Nov. 1986.
-
(1986)
COMPUTER
, pp. 8-22
-
-
Katz, R.1
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