Latchup paths in bipolar integrated circuits

IEEE Transactions on Nuclear Science

Volumn 33, Issue 6, 1986, Pages 1499-1504

  Baze, M P ^a   Johnston, A H ^a  

^a BOEING COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84939055193     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/TNS.1986.4334630     Document Type: Article

References (10)

1. A. H. Johnston and M. P. Baze, “Experimental Methods for Determining Latchup Paths in Integrated Circuits”, IEEE Trans. Nucl. Sci., NS-32, 4260 (1985).
2. P. V. Dressendorfer and M. G. Armendariz, “A SEM Technique for Experimentally Locating Latchup Paths in Integrated Circuits”, IEEE Trans. Nucl. Sci., NS-27, 1688 (1980).
3. S. M. Sze, Editor, VLSI Technology, pp. 541–546, McGraw-Hill, New Yok (1983).
4. P. F. Kane and G. B. Larrabee, Editors, Characterization of Solid Surfaces, pg. 114, Plenum Press, New York (1978).
5. C. Canali, et al., “An SEM Based System for Complete Characterization of Latchup in CMOS Integrated Circuits”, SCANNING, Vol. 8, 20–33 (1986).
6. B. L. Gregory and B. D. Shafer, “Latchup in CMOS Integrated Circuits”, IEEE Trans, Nucl. Sci., No. 6, 293 (1973).
7. A. Ochoa, Jr., W. R. Dawes and D. B. Estreich, “Latchup Control in CMOS Integrated Circuits”, IEEE Trans, Nucl. Sci., NS-26, 5065 (1979).
8. D. B. Estreich and R. W. Dutton, “Modeling Latchup in CMOS Integrated Circuits”, IEEE Trans. Comp. Aided Design, CAD-1, No. 4, October 1982.
9. R. S. Caldwell, et al., “Mechanism for Radiation Induced Latchup in Microcircuit”, NEREM Record, 28 (1966).
10. R. L. Pease, Mission Research Corporation, Albuquerque, NM, private communication.