Locality-aware mapping of nested parallel patterns on GPUS

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 2015-January, Issue January, 2015, Pages 63-74

  Lee, Hyoukjoong ^a   Brown, Kevin J ^a   Sujeeth, Arvind K ^a   Rompf, Tiark ^b,c   Olukotun, Kunle ^a  

^a STANFORD UNIVERSITY   (United States)

^b PURDUE UNIVERSITY   (United States)

^c ORACLE CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; HIGH LEVEL LANGUAGES; PROGRAM PROCESSORS; SEMANTICS;

AUTOMATIC COMPILATION; COMPILER OPTIMIZATIONS; DEGREE OF PARALLELISM; DYNAMIC MEMORY ALLOCATION; HARD AND SOFT CONSTRAINTS; HIGHER-LEVEL LANGUAGES; OPTIMIZED IMPLEMENTATION; PROGRAMMER PRODUCTIVITY;

MAPPING;

EID: 84937692188     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2014.23     Document Type: Conference Paper

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