B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 2015-January, Issue January, 2015, Pages 623-634

  Kadjo, David ^a   Kim, Jinchun ^a   Sharma, Prabal ^c   Panda, Reena ^d   Gratz, Paul ^a   Jimenez, Daniel ^b  

^a Electrical and Computer Engineering   (United States)

^b Texas AandM University   (United States)

^c Samsung Austin R and D Center   (United States)

^d The University of Texas at Austin   (United States)

Author keywords

Bfetch; Branch Prediction; Chip Multiprocessors; Data Cache; Prefetching

Indexed keywords

BUDGET CONTROL; COMPUTER ARCHITECTURE; DIGITAL STORAGE; MULTIPROCESSING SYSTEMS;

BFETCH; BRANCH PREDICTION; CHIP MULTIPROCESSOR; DATA CACHES; PREFETCHING;

FORECASTING;

EID: 84937692144     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2014.29     Document Type: Conference Paper

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