The design and implementation of custom architectures for evolvable hardware using off-the-shelf programmable devices

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1801, Issue , 2000, Pages 197-207

  Slorach, Craig ^a   Sharman, Ken ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL DESIGN; COMPUTER CIRCUITS; DIGITAL DEVICES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC DEVICES; PROGRAMMABLE LOGIC CONTROLLERS;

CELL SPECIFICATION; COMMERCIAL DEVICES; CRITICAL DISCUSSIONS; DESIGN AND IMPLEMENTATIONS; EVOLVABLE HARDWARE; PROGRAMMABLE DEVICES; PROGRAMMABLE LOGIC ARRAY; PROGRAMMABLE LOGIC DEVICE;

INTEGRATED CIRCUIT DESIGN;

EID: 84937441035     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46406-9_20     Document Type: Conference Paper

References (11)

1. H. de Garis, Growing an Artificial Brain with a Million Neural Net Modules Inside a Trillion Cell Cellular Automation Machine, In Proc. 4th Symp. on Micro Machine and Human Science, pages 211-214, 1993.
2. Xilinx Inc., XC6200 Field Programmable Gate Arrays Datasheet V1.10, San Jose, CA, 1997.
3. T.C. Fogarty, J.F. Miller, P. Thompson, Evolving Digital Logic Circuits on Xilinx 6000 Family FPGA's, In P.K. Chawdry, R. Roy, R.K. Pant, eds., Soft Computing in Engineering Design and Manufacturing, pages 299-305, Springer-Verlag, London, 1998.
4. A. Thompson, An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics, In Tetsuya Higuchi, Masaya Iwata, Weixin Liu, eds., Evolvable Systems: From Biology to Hardware, First International Conference, ICES 96, pages 390-405, SpringerVerlag, Berlin, October 1996. Lectures Notes in Computer Science 1259.
5. I. Kajiani, et al, A Gate-Level EHW Chip: Implementing GA Operations and Re-configurable Hardware on a Single LSI, In Moshe Sipper, Daniel Mange, Andres Perez-Uribe, eds., Evolvable Systems: From Biology to Hardware, Second International Conference ICES 98, pages 1-12, Springer-Verlag, Berlin, September 1998. Lecture Notes in Computer Science 1478.
6. S.A. Guccione, D. Levi, XBI: A Java-Based Interface to FPGA Hardware, In John Schewel, editor, Configurable Computing: Technology and Applications, Proc. SPIE 3526, pages 97-102, Bellingham, WA, November 1998. SPIE - The International Society for Optical Engineering.
7. Aptix Inc., System Explorer Datasheet, http://www.aptix.com/nova/products.
8. H. de Garis, Evolvable Hardware: Genetic Programming of a Darwin Machine, In R.F. Albrecht, C.R. Reeves, N.C. Steele, eds., Artiicial Neural Nets and Genetic Algorithms, Springer-Verlag, NY, 1993.
9. D. Levi, S.A. Guccione, GeneticFPGA: A Java-Based Tool for Evolving Stable Circuits, In John Schewel, editor, Reconigurable Technology: FPGAs for Computing and Applications, Proc. SPIE 3844, pages 114-123, Bellingham, WA, September 1999. SPIE - The International Society for Optical Engineering.
10. C.E. Shannon, The Synthesis of Two-Terminal Switching Circuits, Bell System Technical Journal, Vol. 28, pages 59-98, January 1949.
11. Xilinx Inc., Virtex 2.5V Field Programmable Gate Arrays Datasheet V1.7, San Jose, CA, 1999.