Genetic algorithm-based design methodology for pattern recognition hardware

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1801, Issue , 2000, Pages 264-273

  Yasunaga, Moritoshi ^a   Nakamura, Taro ^a   Yoshihara, Ikuo ^b   Kim, Jung H ^c  

^a UNIVERSITY OF TSUKUBA   (Japan)

^b UNIVERSITY OF MIYAZAKI   (Japan)

^c University of Louisiana at Lafayette   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL ARITHMETIC; GENETIC ALGORITHMS; IMAGE RECOGNITION; INTEGRATED CIRCUIT MANUFACTURE; LOGIC CIRCUITS; LOGIC DESIGN;

ALGORITHM-BASED DESIGNS; CONVENTIONAL APPROACH; FACE IMAGE RECOGNITION; GENERALIZATION OPERATORS; IMPLEMENTATION APPROACH; INTRINSIC PARALLELISMS; LOGIC CIRCUIT DESIGN; SPECTRUM RECOGNITION;

COMPUTER CIRCUITS;

EID: 84937414328     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46406-9_26     Document Type: Conference Paper

References (6)

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3. Torresen, J.: A Divide-and-Conquer Approach to Evolvable Hardware. Lecture Notes in Computer Science, Vol. 1478. Springer-Verlag, (1998) 57-65
4. Fukunaga, K.: Introduction to Statistical Pattern Recognition. Academic Press (1990)
5. Turk, M., Pentland, A.: Eigenfaces for recognition. J. Cognitive Neuroscience. Vol.3 (1991) 71-86
6. Gorman, R.P., Sejnowski, T.J.: Analysis of Hidden Units in a Layered Network Trained to Classify Sonar Targets. J. Neural Networks. Vol.1 (1988) 75-89