Pipelined architecture for inverse discrete cosine transform

European Signal Processing Conference

Volumn 2015-March, Issue March, 2000, Pages

  Nikara, Jari ^a   Takala, Jarmo ^a   Akopian, David ^b   Saarinen, Jukka ^a   Astola, Jaakko ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

^b NOKIA RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSINE TRANSFORMS; DISCRETE COSINE TRANSFORMS; FAST FOURIER TRANSFORMS; PIPELINE PROCESSING SYSTEMS; SIGNAL PROCESSING;

IEEE STANDARDS; INVERSE COSINE TRANSFORM; INVERSE DISCRETE COSINE TRANSFORMS; PIPELINE ARCHITECTURE; PIPELINED ARCHITECTURE; PROPOSED ARCHITECTURES; VERTICAL PROJECTION;

INVERSE TRANSFORMS;

EID: 84937061330     PISSN: 22195491     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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