FPGA implementation of a fully digital FM demodulator

9th International Conference on Communications Systems 2004, ICCS 2004

Volumn , Issue , 2004, Pages 446-450

  Yi, Fubing ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; MICROWAVE DEMODULATORS; SIGNAL PROCESSING;

DESIGN PARAMETERS; DSP PROCESSOR; EVALUATION RESULTS; FM DEMODULATIONS; FPGA ARCHITECTURES; FPGA IMPLEMENTATIONS; SATELLITE SYSTEM; SIGNAL PROCESSING APPLICATIONS;

DEMODULATORS;

EID: 84934272847     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCS.2004.1359416     Document Type: Conference Paper

References (4)

1. J. E. VoIder, "The CORDIC Trigonometric Computing Technique", IRE Tranactions on. Electronic Computers, vol 8, pp. 330-334, Sept. 1959.
2. I. N. Coleman, "A High Speed Logarithmic Arithmetrtic Unit", ESPRIT Long-term Research project No. 33544 HSLA.
3. E. Deprettere, P. Dewiddle, and R. Udo, "Pipelined cordic architecture for fast vlsi filtering and array processing", in Proc. ICASSP84, pp. 41.A.6.1-41.A.6.4, 1984.
4. F. Schnyder and C. Haller, Implementation of FM Demodulator Algorithms on a High Performance Digital Signal Processor, Nanyang Technological University and Hochschule For Technik Rapperswil, 2002.