Majority logic synthesis for spin wave technology

Proceedings - 2014 17th Euromicro Conference on Digital System Design, DSD 2014

Volumn , Issue , 2014, Pages 691-694

  Zografos, Odysseas ^a,b   Amarù, Luca ^a   Gaillardon, Pierre Emmanuel ^a   Raghavan, Praveen ^a   De Micheli, Giovanni ^a  

^a EPFL   (Switzerland)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Majority synthesis; Spin wave devices

Indexed keywords

CARRIER TRANSPORT; CMOS INTEGRATED CIRCUITS; COMPUTER CIRCUITS; DELAY CIRCUITS; LOGIC SYNTHESIS; SPIN WAVES;

DELAY PERFORMANCE; EXPRESSIVE POWER; INFORMATION CARRIERS; MAJORITY GATES; POWER PRODUCTS; SYNTHESIS METHODOLOGY; ULTRA-LOW POWER CONSUMPTION; WAVE TECHNOLOGIES;

MAJORITY LOGIC;

EID: 84928789432     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2014.99     Document Type: Conference Paper

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