A 5.8nW, 45ppm/°C on-chip CMOS wake-up timer using a constant charge subtraction scheme

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014

Volumn , Issue , 2014, Pages

  Jeong, Seokhyeon ^a   Lee, Inhee ^a   Blaauw, David ^a   Sylvester, Dennis ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPARATOR CIRCUITS; COMPARATORS (OPTICAL); INTEGRATED CIRCUIT MANUFACTURE; TEMPERATURE DISTRIBUTION; TIMING CIRCUITS; WAKES;

CONSTANT CHARGES; DESIGN CONSTRAINTS; LOW-POWER OPERATION; OSCILLATION PERIODS; TEMPERATURE DEPENDENCE; TEMPERATURE STABILITY; ULTRA LOW POWER; WIRELESS SENSOR;

CMOS INTEGRATED CIRCUITS;

EID: 84928139426     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2014.6946008     Document Type: Conference Paper

References (9)

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