Colonial competitive algorithm development toward harmonic minimization in multilevel inverters

IEEE Transactions on Industrial Informatics

Volumn 11, Issue 2, 2015, Pages 459-466

  Etesami, M H ^a   Farokhnia, Naeem ^b   Hamid Fathi, S ^a  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

^b Texas AandM University   (United States)

Author keywords

Cascade multilevel inverter; Improved colonial competitive algorithm; Selective harmonic elimination pwm

Indexed keywords

ELECTRIC INVERTERS; ELECTRIC RECTIFIERS; EVOLUTIONARY ALGORITHMS; GENETIC ALGORITHMS; HARMONIC ANALYSIS; PARTICLE SWARM OPTIMIZATION (PSO); PULSE WIDTH MODULATION; VOLTAGE CONTROL;

CASCADE MULTILEVEL INVERTER; COLONIAL COMPETITIVE ALGORITHMS; LOW ORDER HARMONICS; MULTILEVEL INVERTER; OBJECTIVE FUNCTIONS; SELECTIVE HARMONIC ELIMINATION; SELECTIVE HARMONIC ELIMINATION PWM; SWITCHING TECHNIQUES;

ALGORITHMS;

EID: 84926490459     PISSN: 15513203     EISSN: None     Source Type: Journal    
DOI: 10.1109/TII.2015.2402615     Document Type: Article

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