Process technology optimization using an integrated process and device simulation sequencing system

European Solid-State Device Research Conference

Volumn , Issue , 1992, Pages 507-510

  Cartuyvels, Rudi ^a   Booth, Richard ^a   Dupas, Luc ^a   De Meyer, Kristim ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; OPTIMIZATION; SOLID STATE DEVICES;

CMOS PROCESSS; DEVICE SIMULATIONS; EXPERIMENTAL DESIGN STRATEGIES; INPUT FACTORS; ITS APPLICATIONS; PROCESS TECHNOLOGIES; SEQUENCING SYSTEMS;

DESIGN OF EXPERIMENTS;

EID: 84926421292     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. A. Alvarez, B. Abdi, D. Young, H. Weed and E. Herald, IEEE Trans. CAD 7 (1988) 272.
2. C. Lombardl, Microelectronic Engineering 10 (1991) 287.
3. D. Young, J. Teplik, H. Weed, N. Tracht and A. Alvarez, IEEE Trans. CAD 10 (1991) 103.
4. R. Cartuyvels, R. Booth, L. Dupas and K. De Meyer, Conference on Simulation of Semiconductor Devices and Processes (SISDEP), Zurich Switzerland, 1991.
5. R. Booth, L. Dupas, R. Cartuyvels and K. De Meyer, International Workshop on VLSI Process and Device Modeling (VPAD), Oiso Kanagawa Japan, 1991.
6. NAG Fortran Library Manual, Mark 15, Vol. 4, Numerical Algorithms Group Limited, 1991.
7. MINIMOS'5 User's Guide, TU Vienna, 1991.