Leaving one slot empty: Flit Bubble flow control for torus cache-coherent nocs

IEEE Transactions on Computers

Volumn 64, Issue 3, 2015, Pages 763-777

  Ma, Sheng ^a   Wang, Zhiying ^a   Liu, Zonglin Liu ^b   Jerger, Natalie Enright ^c  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

^b NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (United States)

^c UNIVERSITY OF TORONTO   (Canada)

Author keywords

buffer utilization; Cache coherence; deadlock avoidance theory; torus networks on chip

Indexed keywords

ELECTRIC CIRCUIT BREAKERS; MICROPROCESSOR CHIPS; NETWORK-ON-CHIP;

BUBBLE FLOW CONTROLS; BUFFER UTILIZATION; CACHE COHERENCE; DEADLOCK AVOIDANCE; DEADLOCK-FREE OPERATIONS; HIGH FREQUENCY HF; LARGER NETWORKS; TORUS NETWORKS;

FLOW CONTROL;

EID: 84923069378     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2013.2295523     Document Type: Article

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