-
1
-
-
34548238648
-
The amd opteron northbridge architecture
-
Mar.
-
P. Conway and B. Hughes, "The AMD Opteron Northbridge Architecture," IEEE Micro, vol. 27, pp. 10-21, Mar. 2007.
-
(2007)
IEEE Micro
, vol.27
, pp. 10-21
-
-
Conway, P.1
Hughes, B.2
-
2
-
-
0038346234
-
Token coherence: Decoupling performance and correctness
-
Jun.
-
M. M. K. Martin et al., "Token Coherence: Decoupling Performance and Correctness," in ISCA, Jun. 2003.
-
(2003)
ISCA
-
-
Martin, M.M.K.1
-
3
-
-
52649171528
-
Virtual circuit tree multicasting: A case for on-chip hardware multicast support
-
N. Jerger et al., "Virtual Circuit Tree Multicasting: A Case for On-chip Hardware Multicast Support," in ISCA, 2008.
-
(2008)
ISCA
-
-
Jerger, N.1
-
4
-
-
64949116918
-
Mrr: Enabling fully adaptive multicast routing for cmp interconnection networks
-
P. A. Fidalgo et al., "MRR: Enabling Fully Adaptive Multicast Routing for CMP Interconnection Networks," in HPCA, 2009.
-
(2009)
HPCA
-
-
Fidalgo, P.A.1
-
5
-
-
66749138110
-
Efficient unicast and multicast support for cmps
-
S. Rodrigo et al., "Efficient Unicast and Multicast Support for CMPs," in MICRO, 2008, pp. 364-375.
-
(2008)
MICRO
, pp. 364-375
-
-
Rodrigo, S.1
-
6
-
-
70349826938
-
Recursive partitioning multicast: A bandwidth-efficient routing for networks-on-chip
-
L. Wang et al., "Recursive Partitioning Multicast: A Bandwidth-Efficient Routing for Networks-on-Chip," in NOCS, 2009.
-
(2009)
NOCS
-
-
Wang, L.1
-
7
-
-
49749088882
-
Multicast parallel pipeline router architecture for network-on-chip
-
F. A. Samman et al., "Multicast Parallel Pipeline Router Architecture for Network-on-Chip," in DATE, 2008, pp. 1396-1401.
-
(2008)
DATE
, pp. 1396-1401
-
-
Samman, F.A.1
-
8
-
-
84858790896
-
Towards the ideal on-chip fabric for 1-to-many and many-to-1 communication
-
T. Krishna et al., "Towards the Ideal On-Chip Fabric for 1-to-Many and Many-to-1 Communication," in MICRO, 2011.
-
(2011)
MICRO
-
-
Krishna, T.1
-
9
-
-
84860323871
-
Supporting efficient collective communication in nocs
-
S. Ma et al., "Supporting efficient collective communication in NoCs," in HPCA, 2012, pp. 165-176.
-
(2012)
HPCA
, pp. 165-176
-
-
Ma, S.1
-
10
-
-
80052543351
-
Tlsync: Support for multiple fast barriers using on-chip transmission lines
-
J. Oh et al., "TLSync: support for multiple fast barriers using on-chip transmission lines," in ISCA, 2011, pp. 105-116.
-
(2011)
ISCA
, pp. 105-116
-
-
Oh, J.1
-
11
-
-
77954494246
-
Efficient and scalable barrier synchronization for many-core cmps
-
J. L. Abellán et al., "Efficient and Scalable Barrier Synchronization for Many-Core CMPs," in ICCF, 2010, pp. 73-74.
-
(2010)
ICCF
, pp. 73-74
-
-
Abellán, J.L.1
-
12
-
-
0042281592
-
The need for fast communication in hardware-based speculative chip multiprocessors
-
Feb.
-
V. Krishnan et al., "The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors," Int. J. Parallel Program., vol. 29, pp. 3-33, Feb. 2001.
-
(2001)
Int. J. Parallel Program.
, vol.29
, pp. 3-33
-
-
Krishnan, V.1
-
14
-
-
50249133214
-
Equalized interconnects for on-chip networks: Modeling and optimization framework
-
B. Kim and V. Stojanović, "Equalized Interconnects for On-Chip Networks: Modeling and Optimization Framework," in ICCAD, 2007.
-
(2007)
ICCAD
-
-
Kim, B.1
Stojanović, V.2
-
15
-
-
84880266578
-
Breaking the on-chip latency barrier using smart
-
T. Krishna et al., "Breaking the On-Chip Latency Barrier Using SMART," in HPCA, 2013, pp. 378-389.
-
(2013)
HPCA
, pp. 378-389
-
-
Krishna, T.1
-
16
-
-
84885601052
-
Smart: A single-cycle reconfigurable noc for soc applications
-
C.-H. O. Chen et al., "SMART: A Single-Cycle Reconfigurable NoC for SoC Applications," in DATE, 2013, pp. 338-343.
-
(2013)
DATE
, pp. 338-343
-
-
Chen, C.-H.O.1
-
17
-
-
84922491727
-
-
http://www.itrs.net.
-
-
-
-
18
-
-
84862740379
-
Dsent-A tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling
-
C. Sun et al., "DSENT-a tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling," in NOCS, 2012, pp. 201-210.
-
(2012)
NOCS
, pp. 201-210
-
-
Sun, C.1
-
19
-
-
70049105948
-
Garnet: A detailed on-chip network model inside a full-system simulator
-
N. Agarwal et al., "GARNET: A Detailed On-chip Network Model inside a Full-system Simulator," in ISPASS, 2009, pp. 33-42.
-
(2009)
ISPASS
, pp. 33-42
-
-
Agarwal, N.1
-
20
-
-
33748870886
-
Multifacet's general execution-driven multiprocessor simulator (gems) toolset
-
M. M. K. Martin et al., "Multifacet's General Execution-driven Multiprocessor Simulator (GEMS) Toolset," CAN, 2005.
-
(2005)
CAN
-
-
Martin, M.M.K.1
-
21
-
-
0029179077
-
The splash-2 programs: Characterization and methodological considerations
-
S. C. Woo et al., "The SPLASH-2 Programs: Characterization and Methodological Considerations," in ISCA, 1995, pp. 24-36.
-
(1995)
ISCA
, pp. 24-36
-
-
Woo, S.C.1
-
22
-
-
63549095070
-
The parsec benchmark suite: Characterization and architectural implications
-
C. Bienia et al., "The PARSEC Benchmark Suite: Characterization and Architectural Implications," in PACT, 2008.
-
(2008)
PACT
-
-
Bienia, C.1
-
23
-
-
84922491726
-
-
http://www.windriver.com/products/simics.
-
-
-
-
24
-
-
0020705129
-
The nyu ultracomputer-designing a mimd shared memory parallel computer
-
A. Gottlieb et al., "The NYU Ultracomputer-Designing a MIMD Shared Memory Parallel Computer," IEEE Trans. on Computers, vol. 32, pp. 175-189, 1983.
-
(1983)
IEEE Trans. on Computers
, vol.32
, pp. 175-189
-
-
Gottlieb, A.1
-
25
-
-
21044437801
-
Overview of the blue gene/l system architecture
-
Mar.
-
A. Gara et al., "Overview of the Blue Gene/L system architecture," IBM J. Res. Dev., vol. 49, pp. 195-212, Mar. 2005.
-
(2005)
IBM J. Res. Dev.
, vol.49
, pp. 195-212
-
-
Gara, A.1
-
26
-
-
0022200333
-
The ibm research parallel processor prototype (rp3): Introduction and architecture
-
G. F. Pfister et al., "The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture," in ICPP, 1985.
-
(1985)
ICPP
-
-
Pfister, G.F.1
-
27
-
-
79951712762
-
Remap: A reconfigurable heterogeneous multicore architecture
-
M. A. Watkins et al., "ReMAP: A reconfigurable heterogeneous multicore architecture," in MICRO, 2010.
-
(2010)
MICRO
-
-
Watkins, M.A.1
|