High performance 0.3 μm cmos technology using i-line lithography

European Solid-State Device Research Conference

Volumn , Issue , 1996, Pages 597-600

  Montree, A H ^a   Ansem, W Gehoel V ^a   Huijten, L H M ^a   Juffermans, C A H ^a   De Laat, W T F M ^a   Lohmeier, M ^a   Manders, B S ^a   Meijer, P M ^a   Paulzen, G M ^a   Roes, R F M ^a   Webster, M N ^a   Zandbergen, P ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; I-LINE LITHOGRAPHY;

EID: 84920744821     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. M. Bohr et.al. IEDM Techn. Digest 1994, p. 273.
2. V.M.H. Meyssen et.al. ESSDERC Techn. Digest 1995, p. 679.
3. D.M. Boulin et.al. VLSI Techn. Digest 1995, p. 65.
4. G.V. Thakar et al. VLSI Techn. Digest 1995, p. 75.